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Searched refs:UVD_SUVD_CGC_GATE__SIT_MASK (Results 1 – 19 of 19) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Duvd_v6_0.c662 UVD_SUVD_CGC_GATE__SIT_MASK |
695 UVD_SUVD_CGC_GATE__SIT_MASK |
1285 UVD_SUVD_CGC_GATE__SIT_MASK | in uvd_v6_0_enable_clock_gating()
1410 UVD_SUVD_CGC_GATE__SIT_MASK |
H A Duvd_v5_0.c637 UVD_SUVD_CGC_GATE__SIT_MASK | in uvd_v5_0_enable_clock_gating()
750 UVD_SUVD_CGC_GATE__SIT_MASK |
H A Duvd_v7_0.c1623 UVD_SUVD_CGC_GATE__SIT_MASK |
1696 UVD_SUVD_CGC_GATE__SIT_MASK |
H A Dvcn_v4_0_3.c583 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v1_0.c537 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_0.c556 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c726 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v2_5.c642 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c763 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v3_0_disable_clock_gating()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h227 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Duvd_5_0_sh_mask.h725 #define UVD_SUVD_CGC_GATE__SIT_MASK 0x2 macro
H A Duvd_6_0_sh_mask.h727 #define UVD_SUVD_CGC_GATE__SIT_MASK 0x2 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h455 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Dvcn_2_5_sh_mask.h2084 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3210 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3755 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2820 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Dvcn_4_0_0_sh_mask.h1337 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro
H A Dvcn_4_0_3_sh_mask.h1337 #define UVD_SUVD_CGC_GATE__SIT_MASK … macro