/openbsd/gnu/llvm/llvm/lib/Target/VE/Disassembler/ |
H A D | VEDisassembler.cpp | 93 VE::Q0, VE::Q1, VE::Q2, VE::Q3, VE::Q4, VE::Q5, VE::Q6, VE::Q7, 94 VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15, 95 VE::Q16, VE::Q17, VE::Q18, VE::Q19, VE::Q20, VE::Q21, VE::Q22, VE::Q23, 96 VE::Q24, VE::Q25, VE::Q26, VE::Q27, VE::Q28, VE::Q29, VE::Q30, VE::Q31}; 99 VE::V0, VE::V1, VE::V2, VE::V3, VE::V4, VE::V5, VE::V6, VE::V7, 100 VE::V8, VE::V9, VE::V10, VE::V11, VE::V12, VE::V13, VE::V14, VE::V15, 101 VE::V16, VE::V17, VE::V18, VE::V19, VE::V20, VE::V21, VE::V22, VE::V23, 102 VE::V24, VE::V25, VE::V26, VE::V27, VE::V28, VE::V29, VE::V30, VE::V31, 103 VE::V32, VE::V33, VE::V34, VE::V35, VE::V36, VE::V37, VE::V38, VE::V39, 104 VE::V40, VE::V41, VE::V42, VE::V43, VE::V44, VE::V45, VE::V46, VE::V47, [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/VE/MCTargetDesc/ |
H A D | VEAsmBackend.cpp | 36 case VE::fixup_ve_hi32: in adjustFixupValue() 37 case VE::fixup_ve_pc_hi32: in adjustFixupValue() 38 case VE::fixup_ve_got_hi32: in adjustFixupValue() 40 case VE::fixup_ve_plt_hi32: in adjustFixupValue() 44 case VE::fixup_ve_reflong: in adjustFixupValue() 45 case VE::fixup_ve_srel32: in adjustFixupValue() 46 case VE::fixup_ve_lo32: in adjustFixupValue() 47 case VE::fixup_ve_pc_lo32: in adjustFixupValue() 72 case VE::fixup_ve_srel32: in getFixupKindNumBytes() 73 case VE::fixup_ve_hi32: in getFixupKindNumBytes() [all …]
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H A D | VEELFObjectWriter.cpp | 70 case VE::fixup_ve_reflong: in getRelocType() 71 case VE::fixup_ve_srel32: in getRelocType() 94 case VE::fixup_ve_reflong: in getRelocType() 96 case VE::fixup_ve_srel32: in getRelocType() 100 case VE::fixup_ve_hi32: in getRelocType() 102 case VE::fixup_ve_lo32: in getRelocType() 104 case VE::fixup_ve_pc_hi32: in getRelocType() 108 case VE::fixup_ve_pc_lo32: in getRelocType() 112 case VE::fixup_ve_got_hi32: in getRelocType() 114 case VE::fixup_ve_got_lo32: in getRelocType() [all …]
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H A D | VEMCExpr.cpp | 144 return VE::fixup_ve_reflong; in getFixupKind() 146 return VE::fixup_ve_hi32; in getFixupKind() 148 return VE::fixup_ve_lo32; in getFixupKind() 150 return VE::fixup_ve_pc_hi32; in getFixupKind() 152 return VE::fixup_ve_pc_lo32; in getFixupKind() 154 return VE::fixup_ve_got_hi32; in getFixupKind() 156 return VE::fixup_ve_got_lo32; in getFixupKind() 162 return VE::fixup_ve_plt_hi32; in getFixupKind() 164 return VE::fixup_ve_plt_lo32; in getFixupKind() 170 return VE::fixup_ve_tpoff_hi32; in getFixupKind() [all …]
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H A D | VEMCExpr.h | 68 VE::Fixups getFixupKind() const { return getFixupKind(Kind); } in getFixupKind() 90 static VE::Fixups getFixupKind(VariantKind Kind);
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H A D | VEMCTargetDesc.cpp | 39 unsigned Reg = MRI.getDwarfRegNum(VE::SX11, true); in createVEMCAsmInfo() 53 InitVEMCRegisterInfo(X, VE::SX10); in createVEMCRegisterInfo()
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H A D | VEInstPrinter.cpp | 32 unsigned AltIdx = VE::AsmName; in printRegName() 34 if (MRI.getRegClass(VE::MISCRegClassID).contains(Reg)) in printRegName() 35 AltIdx = VE::NoRegAltName; in printRegName()
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/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VEFrameLowering.cpp | 200 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX17) in emitEpilogueInsns() 205 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX16) in emitEpilogueInsns() 209 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX15) in emitEpilogueInsns() 215 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX10) in emitEpilogueInsns() 219 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX9) in emitEpilogueInsns() 243 BuildMI(MBB, MBBI, DL, TII.get(VE::LEArii), VE::SX11) in emitSPAdjustment() 257 BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX13) in emitSPAdjustment() 268 BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX11) in emitSPAdjustment() 354 BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX9) in emitPrologue() 367 BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX17) in emitPrologue() [all …]
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H A D | VEInstrInfo.cpp | 776 return (reg - VE::VMP0) * 2 + VE::VM0; in getVM512Upper() 847 {VE::VFMKyal, {VE::VFMKLal, VE::VFMKLal}}, in expandPseudoVFMK() 848 {VE::VFMKynal, {VE::VFMKLnal, VE::VFMKLnal}}, in expandPseudoVFMK() 849 {VE::VFMKWyvl, {VE::PVFMKWUPvl, VE::PVFMKWLOvl}}, in expandPseudoVFMK() 850 {VE::VFMKWyvyl, {VE::PVFMKWUPvml, VE::PVFMKWLOvml}}, in expandPseudoVFMK() 851 {VE::VFMKSyvl, {VE::PVFMKSUPvl, VE::PVFMKSLOvl}}, in expandPseudoVFMK() 852 {VE::VFMKSyvyl, {VE::PVFMKSUPvml, VE::PVFMKSLOvml}}, in expandPseudoVFMK() 1048 BuildMI(BB, dl, TII.get(VE::LDrii), VE::SX61) in expandExtendStackPseudo() 1052 BuildMI(BB, dl, TII.get(VE::ORri), VE::SX62) in expandExtendStackPseudo() 1055 BuildMI(BB, dl, TII.get(VE::LEAzii), VE::SX63) in expandExtendStackPseudo() [all …]
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H A D | VERegisterInfo.cpp | 93 Reserved.set(VE::VM0); in getReservedRegs() 94 Reserved.set(VE::VMP0); in getReservedRegs() 102 return &VE::I64RegClass; in getPointerRegClass() 112 using namespace llvm::VE; in offsetToDisp() 459 case VE::STQrii: in processMI() 462 case VE::LDQrii: in processMI() 465 case VE::STVMrii: in processMI() 468 case VE::LDVMrii: in processMI() 471 case VE::STVM512rii: in processMI() 474 case VE::LDVM512rii: in processMI() [all …]
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H A D | VEFrameLowering.h | 60 {VE::SX17, 40}, {VE::SX18, 48}, {VE::SX19, 56}, {VE::SX20, 64}, in getCalleeSavedSpillSlots() 61 {VE::SX21, 72}, {VE::SX22, 80}, {VE::SX23, 88}, {VE::SX24, 96}, in getCalleeSavedSpillSlots() 62 {VE::SX25, 104}, {VE::SX26, 112}, {VE::SX27, 120}, {VE::SX28, 128}, in getCalleeSavedSpillSlots() 63 {VE::SX29, 136}, {VE::SX30, 144}, {VE::SX31, 152}, {VE::SX32, 160}, in getCalleeSavedSpillSlots() 64 {VE::SX33, 168}}; in getCalleeSavedSpillSlots()
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H A D | VERegisterInfo.td | 10 // Declarations that describe the VE register file 18 let Namespace = "VE"; 26 let Namespace = "VE"; 34 let Namespace = "VE"; 44 let Namespace = "VE"; 49 let Namespace = "VE" in { 77 def MISC : RegisterClass<"VE", [i64], 64, 173 def I32 : RegisterClass<"VE", [i32], 32, 181 def F32 : RegisterClass<"VE", [f32], 32, 185 def F128 : RegisterClass<"VE", [f128], 128, [all …]
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H A D | VEISelLowering.cpp | 2050 .addReg(VE::SX15) in prepareMBB() 2249 MIB.addReg(VE::SX17); in emitEHSjLjSetJmp() 2292 BuildMI(RestoreMBB, DL, TII->get(VE::LDrii), VE::SX17); in emitEHSjLjSetJmp() 2293 MIB.addReg(VE::SX10); in emitEHSjLjSetJmp() 2324 Register FP = VE::SX9; in emitEHSjLjLongJmp() 2325 Register SP = VE::SX11; in emitEHSjLjLongJmp() 2356 BuildMI(*ThisMBB, MI, DL, TII->get(VE::ORri), VE::SX10) in emitEHSjLjLongJmp() 2474 BuildMI(TrapBB, DL, TII->get(VE::BSICrii), VE::SX10) in emitSjLjDispatchBlock() 2497 BuildMI(DispatchBB, DL, TII->get(VE::GETGOT), VE::SX15); in emitSjLjDispatchBlock() 2542 .addReg(VE::SX15) in emitSjLjDispatchBlock() [all …]
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H A D | VE.td | 1 //===-- VE.td - Describe the VE Target Machine -------------*- tablegen -*-===// 19 // VE Subtarget features. 38 // Use both VE register name matcher to accept "S0~S63" register names 45 // VE processors supported. 63 def VE : Target {
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H A D | VEAsmPrinter.cpp | 88 SICInst.setOpcode(VE::SIC); in emitSIC() 96 BSICInst.setOpcode(VE::BSICrii); in emitBSIC() 108 LEAInst.setOpcode(VE::LEAzii); in emitLEAzzi() 120 LEASLInst.setOpcode(VE::LEASLzii); in emitLEASLzzi() 132 LEAInst.setOpcode(VE::LEAzii); in emitLEAzii() 145 LEASLInst.setOpcode(VE::LEASLrri); in emitLEASLrri() 166 emitBinary(OutStreamer, VE::ANDrm, RS1, Imm, RD, STI); in emitANDrm() 295 MCOperand RegLR = MCOperand::createReg(VE::SX10); // LR in lowerGETTLSAddrAndEmitMCInsts() 339 case VE::GETGOT: in emitInstruction() 342 case VE::GETFUNPLT: in emitInstruction() [all …]
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H A D | CMakeLists.txt | 1 add_llvm_component_group(VE) 3 set(LLVM_TARGET_DEFINITIONS VE.td) 44 VE
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H A D | VECallingConv.td | 1 //===-- VECallingConv.td - Calling Conventions VE ----------*- tablegen -*-===// 9 // This describes the calling conventions for the VE architectures. 14 // Aurora VE 24 ///// C Calling Convention (VE ABI v2.1) ///// 26 // Reference: https://www.nec.com/en/global/prod/hpc/aurora/document/VE-ABI_v2.1.pdf 58 ///// Standard vararg C Calling Convention (VE ABI v2.1) /////
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H A D | LVLGen.cpp | 57 return VE::NoRegister; in getVL() 78 if (Reg != VE::NoRegister) { in runOnMachineBasicBlock() 91 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(VE::LVLr)).addReg(Reg); in runOnMachineBasicBlock()
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/openbsd/gnu/llvm/llvm/lib/Target/VE/AsmParser/ |
H A D | VEAsmParser.cpp | 103 VE::SW0, VE::SW1, VE::SW2, VE::SW3, VE::SW4, VE::SW5, VE::SW6, 104 VE::SW7, VE::SW8, VE::SW9, VE::SW10, VE::SW11, VE::SW12, VE::SW13, 105 VE::SW14, VE::SW15, VE::SW16, VE::SW17, VE::SW18, VE::SW19, VE::SW20, 106 VE::SW21, VE::SW22, VE::SW23, VE::SW24, VE::SW25, VE::SW26, VE::SW27, 107 VE::SW28, VE::SW29, VE::SW30, VE::SW31, VE::SW32, VE::SW33, VE::SW34, 108 VE::SW35, VE::SW36, VE::SW37, VE::SW38, VE::SW39, VE::SW40, VE::SW41, 115 VE::SF0, VE::SF1, VE::SF2, VE::SF3, VE::SF4, VE::SF5, VE::SF6, 127 VE::Q0, VE::Q1, VE::Q2, VE::Q3, VE::Q4, VE::Q5, VE::Q6, VE::Q7, 128 VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15, 129 VE::Q16, VE::Q17, VE::Q18, VE::Q19, VE::Q20, VE::Q21, VE::Q22, VE::Q23, [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/DirectX/DXILWriter/ |
H A D | DXILBitcodeWriter.cpp | 107 ValueEnumerator VE; member in llvm::dxil::DXILBitcodeWriter 143 VE.EnumerateType(El.second); in DXILBitcodeWriter() 520 return VE.getTypeID(T); in getTypeID() 529 return VE.getTypeID(T); in getTypeID() 530 return VE.getTypeID(I8PtrTy); in getTypeID() 540 return VE.getTypeID(T); in getGlobalObjectValueTypeID() 867 VE.getAttributeGroups(); in writeAttributeGroupTable() 1842 if (!VE.hasMDs()) in writeFunctionMetadata() 2245 VE.setInstructionID(&I); in writeInstruction() 2629 VE.incorporateFunction(F); in writeFunction() [all …]
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/openbsd/gnu/llvm/llvm/lib/Bitcode/Writer/ |
H A D | BitcodeWriter.cpp | 164 ValueEnumerator VE; member in __anonc9536fe90111::ModuleBitcodeWriterBase 824 VE.getAttributeGroups(); in writeAttributeGroupTable() 2359 if (!VE.hasMDs()) in writeFunctionMetadata() 2779 unsigned ValID = VE.getValueID(V); in pushValueAndType() 2827 VE.setInstructionID(&I); in writeInstruction() 3304 Record[0] = VE.getValueID(&F); in writeGlobalValueSymbolTable() 3384 return !VE.UseListOrders.empty() && VE.UseListOrders.back().F == F; in writeUseListBlock() 3393 VE.UseListOrders.pop_back(); in writeUseListBlock() 3407 VE.incorporateFunction(F); in writeFunction() 3500 VE.purgeFunction(); in writeFunction() [all …]
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/openbsd/gnu/llvm/llvm/include/llvm/BinaryFormat/ELFRelocs/ |
H A D | VE.def | 8 // - System V Application Binary Interface - VE Architecture 10 // - ELF Handling For Thread-Local Storage - VE Architecture
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/openbsd/gnu/llvm/clang/include/clang/Basic/ |
H A D | BuiltinsVE.def | 1 //===--- BuiltinsVE.def - VE Builtin function database ----------*- C++ -*-===// 9 // This file defines the VE-specific builtin function database. Users of
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/openbsd/gnu/llvm/compiler-rt/cmake/ |
H A D | crt-config-ix.cmake | 31 set(VE ve) variable 34 ${PPC64} ${RISCV32} ${RISCV64} ${VE} ${HEXAGON} ${LOONGARCH64})
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/openbsd/gnu/llvm/clang/lib/Serialization/ |
H A D | ASTWriter.cpp | 6526 Record.AddStmt(VE); in VisitOMPInitClause() 6572 Record.AddStmt(VE); in VisitOMPPrivateClause() 6575 Record.AddStmt(VE); in VisitOMPPrivateClause() 6584 Record.AddStmt(VE); in VisitOMPFirstprivateClause() 6587 Record.AddStmt(VE); in VisitOMPFirstprivateClause() 6590 Record.AddStmt(VE); in VisitOMPFirstprivateClause() 6602 Record.AddStmt(VE); in VisitOMPLastprivateClause() 6617 Record.AddStmt(VE); in VisitOMPSharedClause() 6630 Record.AddStmt(VE); in VisitOMPReductionClause() 6632 Record.AddStmt(VE); in VisitOMPReductionClause() [all …]
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