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Searched refs:clear_state_gpu_addr (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_rlc.h195 uint64_t clear_state_gpu_addr; member
H A Damdgpu_rlc.c139 &adev->gfx.rlc.clear_state_gpu_addr, in amdgpu_gfx_rlc_init_csb()
272 &adev->gfx.rlc.clear_state_gpu_addr, in amdgpu_gfx_rlc_fini()
H A Dgfx_v6_0.c2367 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v6_0_rlc_init()
2377 reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256; in gfx_v6_0_rlc_init()
2789 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_gfx_cgpg()
2896 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_pg()
2904 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_pg()
H A Dgfx_v7_0.c3833 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3834 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
4494 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v7_0_sw_fini()
H A Dgfx_v10_0.c4122 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v10_0_rlc_fini()
5037 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v10_0_init_csb()
5039 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v10_0_init_csb()
5043 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v10_0_init_csb()
5045 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v10_0_init_csb()
H A Dgfx_v11_0.c665 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v11_0_rlc_fini()
1770 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v11_0_init_csb()
1772 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v11_0_init_csb()
H A Dgfx_v8_0.c2061 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v8_0_sw_fini()
3871 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v8_0_init_csb()
3873 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v8_0_init_csb()
H A Dgfx_v9_0.c2201 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v9_0_sw_fini()
2488 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v9_0_init_csb()
2490 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v9_0_init_csb()
/openbsd/sys/dev/pci/drm/radeon/
H A Devergreen.c4269 &rdev->rlc.clear_state_gpu_addr); in sumo_rlc_init()
4288 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256; in sumo_rlc_init()
4295 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4); in sumo_rlc_init()
4415 WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in evergreen_rlc_resume()
H A Dsi.c5288 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_gfx_cgpg()
5785 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_pg()
5791 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_pg()
H A Dradeon.h968 uint64_t clear_state_gpu_addr; member
H A Dcik.c6618 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6619 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()