| /openbsd/gnu/llvm/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 125 FLAG(hasPostISelHook) in EmitInstrDocs()
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| H A D | CodeGenInstruction.h | 274 bool hasPostISelHook : 1; variable
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| H A D | CodeGenInstruction.cpp | 460 hasPostISelHook = R->getValueAsBit("hasPostISelHook"); in CodeGenInstruction()
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| H A D | InstrInfoEmitter.cpp | 1155 if (Inst.hasPostISelHook) OS << "|(1ULL<<MCID::HasPostISelHook)"; in emitRecord()
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| /openbsd/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 521 bool hasPostISelHook() const { return Flags & (1ULL << MCID::HasPostISelHook); } in hasPostISelHook() function
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| /openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoF.td | 173 UseNamedOperandTable = 1, hasPostISelHook = 1, isCommutable = 1 in
214 UseNamedOperandTable = 1, hasPostISelHook = 1 in
257 UseNamedOperandTable = 1, hasPostISelHook = 1 in
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| /openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | MIMGInstructions.td | 208 let hasPostISelHook = 1;
592 let mayLoad = 0, mayStore = 1, hasSideEffects = 0, hasPostISelHook = 0,
598 let hasPostISelHook = 1 in
782 mayLoad = 1, mayStore = 1, hasPostISelHook = 0, DisableWQM = 1,
790 let hasPostISelHook = 1 in
1229 Gather4 = 1, hasPostISelHook = 0, mayLoad = 1 in {
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| H A D | DSInstructions.td | 201 let hasPostISelHook = 1;
237 let hasPostISelHook = 1;
267 let hasPostISelHook = 1;
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| H A D | VOPInstructions.td | 96 let hasPostISelHook = 1;
124 let hasPostISelHook = 1;
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| H A D | FLATInstructions.td | 460 let hasPostISelHook = 1;
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| H A D | BUFInstructions.td | 672 let hasPostISelHook = 1;
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| /openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPseudo.td | 431 hasSideEffects = 0, hasPostISelHook = 1 in
439 hasSideEffects = 0, hasPostISelHook = 1 in
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| /openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1146 bool hasPostISelHook(QueryType Type = IgnoreBundle) const {
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| /openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 1185 if (II.hasPostISelHook()) in EmitMachineNode()
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| H A D | SelectionDAGISel.cpp | 307 assert(!MI.hasPostISelHook() && in AdjustInstrPostInstrSelection()
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| /openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 1005 let hasPostISelHook = 1, Defs = [CPSR] in {
1359 let hasPostISelHook = 1, Defs = [CPSR] in {
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| H A D | ARMInstrInfo.td | 1674 let hasPostISelHook = 1, Defs = [CPSR] in {
1707 let hasPostISelHook = 1, Defs = [CPSR] in {
1869 let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in {
1939 let hasPostISelHook = 1, Defs = [CPSR], Uses = [CPSR] in {
5175 let hasPostISelHook = 1, Constraints = "$newdst = $dst, $newsrc = $src" in {
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| H A D | ARMInstrThumb2.td | 869 let hasPostISelHook = 1, Defs = [CPSR] in {
900 let hasPostISelHook = 1, Defs = [CPSR] in {
2368 let hasPostISelHook = 1 in {
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| /openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.td | 1584 let hasPostISelHook = 1;
1590 let hasPostISelHook = 1;
1611 let hasPostISelHook = 1;
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| H A D | Mips32r6InstrInfo.td | 1108 hasExtraSrcRegAllocReq = 1, isCTI = 1, Defs = [AT], hasPostISelHook = 1 in {
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| H A D | MicroMipsInstrInfo.td | 431 let hasPostISelHook = 1;
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| H A D | MicroMips32r6InstrInfo.td | 466 let hasPostISelHook = 1;
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| /openbsd/gnu/llvm/llvm/include/llvm/Target/ |
| H A D | Target.td | 572 bit hasPostISelHook = false; // To be *adjusted* after isel by target hook.
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| /openbsd/gnu/llvm/llvm/docs/TableGen/ |
| H A D | ProgRef.rst | 1941 bit hasPostISelHook = 0;
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