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Searched refs:ixDIDT_SQ_CTRL3 (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c63 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__GC_DIDT_ENABLE_MASK, DIDT_SQ_CTRL3__GC_DIDT_ENABLE__…
64 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__GC_DIDT_CLK_EN_OVERRIDE_MASK, DIDT_SQ_CTRL3__GC_DIDT…
65 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__THROTTLE_POLICY_MASK, DIDT_SQ_CTRL3__THROTTLE_POLICY…
67 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__DIDT_POWER_LEVEL_LOWBIT_MASK, DIDT_SQ_CTRL3__DIDT_PO…
68 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__DIDT_STALL_PATTERN_BIT_NUMS_MASK, DIDT_SQ_CTRL3__DID…
69 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__GC_DIDT_LEVEL_COMB_EN_MASK, DIDT_SQ_CTRL3__GC_DIDT_L…
70 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__SE_DIDT_LEVEL_COMB_EN_MASK, DIDT_SQ_CTRL3__SE_DIDT_L…
71 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__QUALIFY_STALL_EN_MASK, DIDT_SQ_CTRL3__QUALIFY_STALL_…
72 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__DIDT_STALL_SEL_MASK, DIDT_SQ_CTRL3__DIDT_STALL_SEL__…
73 …{ ixDIDT_SQ_CTRL3, DIDT_SQ_CTRL3__DIDT_FORCE_STALL_MASK, DIDT_SQ_CTRL3__DIDT_FORCE_STA…
[all …]
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7148 #define ixDIDT_SQ_CTRL3 … macro
H A Dgc_9_2_1_offset.h7394 #define ixDIDT_SQ_CTRL3 … macro
H A Dgc_9_4_2_offset.h35 #define ixDIDT_SQ_CTRL3 … macro
H A Dgc_9_1_offset.h7356 #define ixDIDT_SQ_CTRL3 … macro
H A Dgc_10_1_0_offset.h11230 #define ixDIDT_SQ_CTRL3 … macro
H A Dgc_10_3_0_offset.h13476 #define ixDIDT_SQ_CTRL3 … macro