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Searched refs:kiq_ring (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_gfx.c507 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_disable_kcq() local
523 kiq->pmf->kiq_unmap_queues(kiq_ring, in amdgpu_gfx_disable_kcq()
529 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_disable_kcq()
555 kiq->pmf->kiq_unmap_queues(kiq_ring, in amdgpu_gfx_disable_kgq()
562 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_disable_kgq()
606 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe, in amdgpu_gfx_enable_kcq()
607 kiq_ring->queue); in amdgpu_gfx_enable_kcq()
626 kiq->pmf->kiq_map_queues(kiq_ring, in amdgpu_gfx_enable_kcq()
630 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_enable_kcq()
662 kiq->pmf->kiq_map_queues(kiq_ring, in amdgpu_gfx_enable_kgq()
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H A Damdgpu_amdkfd_gfx_v10_3.c280 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v10_3() local
296 r = amdgpu_ring_alloc(kiq_ring, 7); in hiq_mqd_load_v10_3()
302 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in hiq_mqd_load_v10_3()
303 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3()
313 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3()
315 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in hiq_mqd_load_v10_3()
316 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in hiq_mqd_load_v10_3()
317 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v10_3()
318 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in hiq_mqd_load_v10_3()
319 amdgpu_ring_commit(kiq_ring); in hiq_mqd_load_v10_3()
H A Damdgpu_amdkfd_gfx_v11.c265 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v11() local
281 r = amdgpu_ring_alloc(kiq_ring, 7); in hiq_mqd_load_v11()
287 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in hiq_mqd_load_v11()
288 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v11()
298 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v11()
300 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in hiq_mqd_load_v11()
301 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in hiq_mqd_load_v11()
302 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v11()
303 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in hiq_mqd_load_v11()
304 amdgpu_ring_commit(kiq_ring); in hiq_mqd_load_v11()
H A Damdgpu_amdkfd_gfx_v10.c294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in kgd_hiq_mqd_load() local
310 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_hiq_mqd_load()
316 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_hiq_mqd_load()
317 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load()
327 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load()
329 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_hiq_mqd_load()
330 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_hiq_mqd_load()
331 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_hiq_mqd_load()
332 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_hiq_mqd_load()
333 amdgpu_ring_commit(kiq_ring); in kgd_hiq_mqd_load()
H A Dgfx_v9_4_3.c64 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_set_resources()
68 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_set_resources()
70 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_set_resources()
101 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_map_queues()
122 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_unmap_queues()
130 amdgpu_ring_write(kiq_ring, 0); in gfx_v9_4_3_kiq_unmap_queues()
131 amdgpu_ring_write(kiq_ring, 0); in gfx_v9_4_3_kiq_unmap_queues()
132 amdgpu_ring_write(kiq_ring, 0); in gfx_v9_4_3_kiq_unmap_queues()
144 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_query_status()
149 amdgpu_ring_write(kiq_ring, in gfx_v9_4_3_kiq_query_status()
[all …]
H A Damdgpu_amdkfd_gfx_v9.c307 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[inst].ring; in kgd_gfx_v9_hiq_mqd_load() local
323 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_gfx_v9_hiq_mqd_load()
329 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_gfx_v9_hiq_mqd_load()
330 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load()
340 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load()
342 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
343 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_gfx_v9_hiq_mqd_load()
344 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
345 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_gfx_v9_hiq_mqd_load()
346 amdgpu_ring_commit(kiq_ring); in kgd_gfx_v9_hiq_mqd_load()
H A Damdgpu_gfx.h131 void (*kiq_set_resources)(struct amdgpu_ring *kiq_ring,
133 void (*kiq_map_queues)(struct amdgpu_ring *kiq_ring,
135 void (*kiq_unmap_queues)(struct amdgpu_ring *kiq_ring,
139 void (*kiq_query_status)(struct amdgpu_ring *kiq_ring,
143 void (*kiq_invalidate_tlbs)(struct amdgpu_ring *kiq_ring,
H A Dgfx_v11_0.c144 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx11_kiq_set_resources()
196 struct amdgpu_device *adev = kiq_ring->adev; in gfx11_kiq_unmap_queues()
210 amdgpu_ring_write(kiq_ring, in gfx11_kiq_unmap_queues()
216 amdgpu_ring_write(kiq_ring, seq); in gfx11_kiq_unmap_queues()
218 amdgpu_ring_write(kiq_ring, 0); in gfx11_kiq_unmap_queues()
219 amdgpu_ring_write(kiq_ring, 0); in gfx11_kiq_unmap_queues()
220 amdgpu_ring_write(kiq_ring, 0); in gfx11_kiq_unmap_queues()
232 amdgpu_ring_write(kiq_ring, in gfx11_kiq_query_status()
241 amdgpu_ring_write(kiq_ring, lower_32_bits(seq)); in gfx11_kiq_query_status()
5543 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v11_0_ring_preempt_ib() local
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H A Damdgpu_amdkfd.c829 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_amdkfd_unmap_hiq() local
853 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { in amdgpu_amdkfd_unmap_hiq()
859 kiq->pmf->kiq_unmap_queues(kiq_ring, ring, RESET_QUEUES, 0, 0); in amdgpu_amdkfd_unmap_hiq()
861 if (kiq_ring->sched.ready && !adev->job_hang) in amdgpu_amdkfd_unmap_hiq()
862 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_amdkfd_unmap_hiq()
H A Dgfx_v9_0.c772 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
776 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
778 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
808 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_map_queues()
829 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_unmap_queues()
834 amdgpu_ring_write(kiq_ring, 0); in gfx_v9_0_kiq_unmap_queues()
835 amdgpu_ring_write(kiq_ring, 0); in gfx_v9_0_kiq_unmap_queues()
852 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status()
857 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status()
871 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_invalidate_tlbs()
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H A Dgfx_v10_0.c3505 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx10_kiq_set_resources()
3554 struct amdgpu_device *adev = kiq_ring->adev; in gfx10_kiq_unmap_queues()
3568 amdgpu_ring_write(kiq_ring, in gfx10_kiq_unmap_queues()
3574 amdgpu_ring_write(kiq_ring, seq); in gfx10_kiq_unmap_queues()
3576 amdgpu_ring_write(kiq_ring, 0); in gfx10_kiq_unmap_queues()
3577 amdgpu_ring_write(kiq_ring, 0); in gfx10_kiq_unmap_queues()
3578 amdgpu_ring_write(kiq_ring, 0); in gfx10_kiq_unmap_queues()
3590 amdgpu_ring_write(kiq_ring, in gfx10_kiq_query_status()
3599 amdgpu_ring_write(kiq_ring, lower_32_bits(seq)); in gfx10_kiq_query_status()
8542 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v10_0_ring_preempt_ib() local
[all …]
H A Dgfx_v8_0.c4318 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_kiq_kcq_enable() local
4347 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v8_0_kiq_kcq_enable()
4348 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v8_0_kiq_kcq_enable()
4349 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v8_0_kiq_kcq_enable()
4359 amdgpu_ring_write(kiq_ring, in gfx_v8_0_kiq_kcq_enable()
4361 amdgpu_ring_write(kiq_ring, in gfx_v8_0_kiq_kcq_enable()
4372 amdgpu_ring_commit(kiq_ring); in gfx_v8_0_kiq_kcq_enable()
4826 amdgpu_ring_write(kiq_ring, 0); in gfx_v8_0_kcq_disable()
4827 amdgpu_ring_write(kiq_ring, 0); in gfx_v8_0_kcq_disable()
4828 amdgpu_ring_write(kiq_ring, 0); in gfx_v8_0_kcq_disable()
[all …]
H A Dmes_v10_1.c804 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in mes_v10_1_kiq_enable_queue() local
810 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v10_1_kiq_enable_queue()
816 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring); in mes_v10_1_kiq_enable_queue()
818 return amdgpu_ring_test_helper(kiq_ring); in mes_v10_1_kiq_enable_queue()
H A Dmes_v11_0.c878 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in mes_v11_0_kiq_enable_queue() local
884 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v11_0_kiq_enable_queue()
890 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring); in mes_v11_0_kiq_enable_queue()
892 return amdgpu_ring_test_helper(kiq_ring); in mes_v11_0_kiq_enable_queue()