Searched refs:mmCH_VC5_ENABLE (Results 1 – 3 of 3) sorted by relevance
| /openbsd/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 283 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000002, 0x00000000),
1386 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000002, 0x00000000),
1427 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000003, 0x00000000),
3381 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000003, 0x00000003),
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| /openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 8113 #define mmCH_VC5_ENABLE … macro
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| H A D | gc_10_3_0_offset.h | 7710 #define mmCH_VC5_ENABLE … macro
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