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Searched refs:mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h3709 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
H A Dgc_10_3_0_offset.h3652 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v10_0.c3389 SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0xffffffff, 0x000fffff),