Home
last modified time | relevance | path

Searched refs:mmGRBM_PWR_CNTL2_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h81 #define mmGRBM_PWR_CNTL2_BASE_IDX … macro
H A Dgc_9_0_offset.h90 #define mmGRBM_PWR_CNTL2_BASE_IDX … macro
H A Dgc_9_2_1_offset.h88 #define mmGRBM_PWR_CNTL2_BASE_IDX … macro
H A Dgc_9_1_offset.h90 #define mmGRBM_PWR_CNTL2_BASE_IDX … macro
H A Dgc_10_1_0_offset.h2094 #define mmGRBM_PWR_CNTL2_BASE_IDX … macro
H A Dgc_10_3_0_offset.h2171 #define mmGRBM_PWR_CNTL2_BASE_IDX … macro