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Searched refs:mmRLC_GPM_UTCL1_CNTL_1 (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_0.c555 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_1, 0x08000000, 0x08000080),
593 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_1, 0x08000000, 0x08000080),
632 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_1, 0xff0fffff, 0x08000080),
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6221 #define mmRLC_GPM_UTCL1_CNTL_1 … macro
H A Dgc_9_2_1_offset.h6419 #define mmRLC_GPM_UTCL1_CNTL_1 … macro
H A Dgc_9_1_offset.h6443 #define mmRLC_GPM_UTCL1_CNTL_1 … macro
H A Dgc_10_1_0_offset.h9547 #define mmRLC_GPM_UTCL1_CNTL_1 … macro
H A Dgc_10_3_0_offset.h9393 #define mmRLC_GPM_UTCL1_CNTL_1 … macro