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Searched refs:mmRMI_UTCL1_CNTL2 (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v9_0.c559 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_UTCL1_CNTL2, 0x00030000, 0x00020000),
574 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_UTCL1_CNTL2, 0x00030000, 0x00030000),
615 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_UTCL1_CNTL2, 0x00030000, 0x00020000),
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1096 #define mmRMI_UTCL1_CNTL2 … macro
H A Dgc_9_2_1_offset.h1069 #define mmRMI_UTCL1_CNTL2 … macro
H A Dgc_9_1_offset.h1103 #define mmRMI_UTCL1_CNTL2 … macro
H A Dgc_10_1_0_offset.h3099 #define mmRMI_UTCL1_CNTL2 … macro
H A Dgc_10_3_0_offset.h3026 #define mmRMI_UTCL1_CNTL2 … macro