Home
last modified time | relevance | path

Searched refs:mmSDMA0_RLC5_WATERMARK (Results 1 – 4 of 4) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_2_offset.h836 #define mmSDMA0_RLC5_WATERMARK … macro
H A Dsdma0_4_2_2_offset.h840 #define mmSDMA0_RLC5_WATERMARK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h826 #define mmSDMA0_RLC5_WATERMARK … macro
H A Dgc_10_3_0_offset.h850 #define mmSDMA0_RLC5_WATERMARK … macro