/openbsd/sys/arch/loongson/dev/ |
H A D | glx.c | 82 uint64_t msr; in glx_init() local 109 msr |= 11 << 8; in glx_init() 110 msr |= 9 << 16; in glx_init() 116 msr |= 4 << 24; in glx_init() 117 msr |= 3 << 28; in glx_init() 122 rdmsr(uint msr) in rdmsr() argument 248 uint64_t msr; in glx_get_status() local 296 uint64_t msr; in glx_fn0_read() local 360 uint64_t msr; in glx_fn0_write() local 424 uint64_t msr; in glx_fn2_read() local [all …]
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/openbsd/sys/arch/amd64/amd64/ |
H A D | est.c | 110 u_int64_t msr; in p4_get_bus_clock() local 157 u_int64_t msr; in p3_get_bus_clock() local 167 bus = (msr >> 0) & 0x7; in p3_get_bus_clock() 197 bus = (msr >> 0) & 0x7; in p3_get_bus_clock() 284 u_int64_t msr; in est_acpi_pss_changed() local 288 cur = msr & 0xffff; in est_acpi_pss_changed() 338 u_int64_t msr; in est_init() local 367 cur = msr & 0xffff; in est_init() 396 cpu_device, msr); in est_init() 486 uint64_t msr; in est_setperf() local [all …]
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H A D | identcpu.c | 102 u_int64_t msr; in intelcore_update_sensor() local 122 msr = rdmsr(MSR_THERM_STATUS); in intelcore_update_sensor() 276 u_int64_t msr; in via_update_sensor() local 291 uint64_t count, last_count, msr; in cpu_freq_ctr() local 440 pmsr032(msr, value, bits); in pmsr32() 690 prevcpu_arch_capa = msr; in identifycpu() 923 uint64_t msr; in cpu_check_vmm_cap() local 975 msr = rdmsr(IA32_VMX_BASIC); in cpu_check_vmm_cap() 980 msr = rdmsr(IA32_VMX_MISC); in cpu_check_vmm_cap() 993 msr = rdmsr(MSR_AMD_VM_CR); in cpu_check_vmm_cap() [all …]
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H A D | amd64_mem.c | 157 int i, j, msr, mrt; in mrfetch() local 168 msrv = rdmsr(msr); in mrfetch() 184 msrv = rdmsr(msr); in mrfetch() 200 msrv = rdmsr(msr); in mrfetch() 216 msr = MSR_MTRRvarBase; in mrfetch() 218 msrv = rdmsr(msr); in mrfetch() 297 int i, j, msr; in mrstoreone() local 320 wrmsr(msr, msrv); in mrstoreone() 330 wrmsr(msr, msrv); in mrstoreone() 340 wrmsr(msr, msrv); in mrstoreone() [all …]
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H A D | cpu.c | 892 uint64_t msr; in cpu_init_vmm() local 1237 uint64_t msr, nmsr; in cpu_fix_msrs() local 1244 wrmsr(MSR_MISC_ENABLE, msr); in cpu_fix_msrs() 1280 nmsr = msr = rdmsr(MSR_DE_CFG); in cpu_fix_msrs() 1282 if (msr != nmsr) in cpu_fix_msrs() 1289 if (msr != nmsr) in cpu_fix_msrs() 1296 msr = rdmsr(MSR_S_CET); in cpu_fix_msrs() 1306 uint64_t msr; in cpu_tsx_disable() local 1317 if (msr & ARCH_CAP_TSX_CTRL) { in cpu_tsx_disable() 1318 msr = rdmsr(MSR_TSX_CTRL); in cpu_tsx_disable() [all …]
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H A D | lapic.c | 180 u_int64_t msr; in lapic_map() local 187 msr = rdmsr(MSR_APICBASE); in lapic_map() 189 if (ISSET(msr, APICBASE_ENABLE_X2APIC) || in lapic_map() 201 if (!ISSET(msr, APICBASE_ENABLE_X2APIC)) { in lapic_map() 202 msr |= APICBASE_ENABLE_X2APIC; in lapic_map() 203 wrmsr(MSR_APICBASE, msr); in lapic_map() 302 uint64_t msr; in lapic_set_lvt() local 304 msr = rdmsr(MSR_INT_PEN_MSG); in lapic_set_lvt() 305 if (msr & (IPM_C1E_CMP_HLT|IPM_SMI_CMP_HLT)) { in lapic_set_lvt() 306 msr &= ~(IPM_C1E_CMP_HLT|IPM_SMI_CMP_HLT); in lapic_set_lvt() [all …]
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H A D | vmm_machdep.c | 749 uint64_t msr; in start_vmm_on_cpu() local 816 uint64_t msr; in stop_vmm_on_cpu() local 1717 } else if (msr >= 0xc0000000 && msr <= 0xc0001fff) { in svm_setmsrbr() 1720 } else if (msr >= 0xc0010000 && msr <= 0xc0011fff) { in svm_setmsrbr() 1758 } else if (msr >= 0xc0000000 && msr <= 0xc0001fff) { in svm_setmsrbw() 1761 } else if (msr >= 0xc0010000 && msr <= 0xc0011fff) { in svm_setmsrbw() 1811 } else if (msr >= 0xc0000000 && msr <= 0xc0001fff) { in vmx_setmsrbr() 1843 } else if (msr >= 0xc0000000 && msr <= 0xc0001fff) { in vmx_setmsrbw() 3005 switch (msr) { in vcpu_vmx_check_cap() 7781 switch (msr) { in msr_name_decode() [all …]
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/openbsd/sys/arch/powerpc/powerpc/ |
H A D | fpu.c | 48 int msr; in enable_fpu() local 59 msr = ppc_mfmsr(); in enable_fpu() 60 ppc_mtmsr((msr & ~PSL_EE) | PSL_FP); in enable_fpu() 99 ppc_mtmsr(msr); in enable_fpu() 110 int msr; in save_fpu() local 112 msr = ppc_mfmsr(); in save_fpu() 113 ppc_mtmsr((msr & ~PSL_EE) | PSL_FP); in save_fpu() 118 ppc_mtmsr(msr); in save_fpu() 166 ppc_mtmsr(msr); in save_fpu()
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/openbsd/sys/arch/i386/i386/ |
H A D | i686_mem.c | 156 int i, j, msr, mrt; in mrfetch() local 167 msrv = rdmsr(msr); in mrfetch() 183 msrv = rdmsr(msr); in mrfetch() 199 msrv = rdmsr(msr); in mrfetch() 215 msr = MSR_MTRRvarBase; in mrfetch() 217 msrv = rdmsr(msr); in mrfetch() 296 int i, j, msr; in mrstoreone() local 319 wrmsr(msr, msrv); in mrstoreone() 329 wrmsr(msr, msrv); in mrstoreone() 339 wrmsr(msr, msrv); in mrstoreone() [all …]
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H A D | longrun.c | 39 u_int64_t msr; member 110 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN); in longrun_setperf() 113 wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr); in longrun_setperf() 115 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS); in longrun_setperf() 117 wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr); in longrun_setperf()
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H A D | machdep.c | 1238 u_int64_t msr; in via_update_sensor() local 1412 u_int64_t msr; in intelcore_update_sensor() local 1640 uint64_t msr, nmsr; in identifycpu() local 2008 if (msr != nmsr) in identifycpu() 2015 if (msr != nmsr) in identifycpu() 2026 uint64_t msr; in identifycpu() local 2108 u_int64_t msr; in cyrix3_get_bus_clock() local 2132 u_int64_t msr; in p4_get_bus_clock() local 2179 u_int64_t msr; in p3_get_bus_clock() local 2303 u_int64_t msr; in p4_update_cpuspeed() local [all …]
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H A D | est.c | 952 #define MSR2MHZ(msr, bus) \ argument 954 #define MSR2MV(msr) \ argument 1020 u_int64_t msr; in est_acpi_pss_changed() local 1024 cur = msr & 0xffff; in est_acpi_pss_changed() 1073 u_int64_t msr; in est_init() local 1105 cur = msr & 0xffff; in est_init() 1132 cpu_device, msr); in est_init() 1148 cpu_device, msr); in est_init() 1242 uint64_t msr; in est_setperf() local 1253 msr &= ~0xffffULL; in est_setperf() [all …]
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/openbsd/sys/arch/arm64/arm64/ |
H A D | locore.S | 61 msr hcr_el2, x2 65 msr vpidr_el2, x2 73 msr sctlr_el1, x2 77 msr cptr_el2, x2 80 msr hstr_el2, xzr 93 msr vbar_el2, x2 96 msr spsr_el2, x2 113 msr elr_el2, x30 186 msr vbar_el1, x2 203 msr mair_el1, x2 [all …]
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H A D | exception.S | 70 msr daifset, #3 79 msr sp_el0, x18 81 msr spsr_el1, x11 82 msr elr_el1, x10 118 msr daifset, #3 131 msr daif, x19 143 msr mdscr_el1, x2 153 msr mdscr_el1, x2 200 msr tpidrro_el0, x18 203 msr vbar_el1, x18
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H A D | trampoline.S | 115 msr tpidrro_el0, x18 120 msr ttbr1_el1, x18 171 msr ttbr1_el1, x18 174 msr tpidrro_el0, xzr 193 msr vbar_el1, x18 196 msr tpidrro_el0, xzr
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H A D | cpufunc_asm.S | 88 msr ttbr1_el1, x2 90 msr ttbr0_el1, x1 210 msr daifset, #3 214 msr s3_5_c15_c5_0, x0 221 msr s3_5_c15_c5_0, x0 224 msr daif, x0
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/openbsd/sys/arch/i386/include/ |
H A D | cpufunc.h | 233 wrmsr(u_int msr, u_int64_t newval) in wrmsr() argument 235 __asm volatile("wrmsr" : : "A" (newval), "c" (msr)); in wrmsr() 239 rdmsr(u_int msr) in rdmsr() argument 243 __asm volatile("rdmsr" : "=A" (rv) : "c" (msr)); in rdmsr() 269 rdmsr_locked(u_int msr, u_int code) in rdmsr_locked() argument 274 : "c" (msr), "D" (code)); in rdmsr_locked() 279 wrmsr_locked(u_int msr, u_int code, u_int64_t newval) in wrmsr_locked() argument 283 : "A" (newval), "c" (msr), "D" (code)); in wrmsr_locked()
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H A D | pctr.h | 77 #define rdmsr(msr) \ argument 80 __asm volatile ("rdmsr" : "=A" (v) : "c" (msr)); \ 84 #define wrmsr(msr, v) \ argument 85 __asm volatile ("wrmsr" :: "A" ((u_int64_t) (v)), "c" (msr));
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/openbsd/sys/arch/amd64/include/ |
H A D | cpufunc.h | 226 rdmsr(u_int msr) in rdmsr() argument 229 __asm volatile("rdmsr" : "=d" (hi), "=a" (lo) : "c" (msr)); in rdmsr() 249 wrmsr(u_int msr, u_int64_t newval) in wrmsr() argument 252 : "a" (newval & 0xffffffff), "d" (newval >> 32), "c" (msr)); in wrmsr() 264 rdmsr_locked(u_int msr, u_int code) in rdmsr_locked() argument 269 : "c" (msr), "D" (code)); in rdmsr_locked() 274 wrmsr_locked(u_int msr, u_int code, u_int64_t newval) in wrmsr_locked() argument 277 : "a" (newval & 0xffffffff), "d" (newval >> 32), "c" (msr), "D" (code)); in wrmsr_locked() 430 int rdmsr_safe(u_int msr, uint64_t *);
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/openbsd/sbin/iked/ |
H A D | eap.c | 343 struct eap_mschap_response *msr; in eap_mschap() local 377 msr = (struct eap_mschap_response *)ms; in eap_mschap() 382 ptr += sizeof(*msr); in eap_mschap() 384 sizeof(*eap) - sizeof(*msr); in eap_mschap() 389 msp = &msr->msr_response.resp_peer; in eap_mschap() 423 struct eap_mschap_response *msr; in eap_parse() local 502 if (len < sizeof(*msr)) in eap_parse() 505 ptr += sizeof(*msr); in eap_parse() 506 len -= sizeof(*msr); in eap_parse() 517 msr->msr_id, betoh16(msr->msr_length), in eap_parse() [all …]
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/openbsd/sys/arch/arm/arm/ |
H A D | setstack.S | 66 msr cpsr_c, r2 70 msr cpsr_c, r3 /* Restore the old mode */ 85 msr cpsr_c, r2 89 msr cpsr_c, r3 /* Restore the old mode */
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/openbsd/sys/arch/powerpc64/include/ |
H A D | cpu.h | 215 u_long msr; in intr_disable() local 217 msr = mfmsr(); in intr_disable() 218 mtmsr(msr & ~PSL_EE); in intr_disable() 219 return msr; in intr_disable() 223 intr_restore(u_long msr) in intr_restore() argument 225 mtmsr(msr); in intr_restore()
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/openbsd/sys/arch/i386/isa/ |
H A D | clock.c | 367 unsigned long long count, last_count, msr; in calibrate_cyclecounter_ctr() local 374 msr = rdmsr(MSR_PERF_FIXED_CTR_CTRL); in calibrate_cyclecounter_ctr() 380 msr |= MSR_PERF_FIXED_CTR_FC(1, MSR_PERF_FIXED_CTR_FC_1); in calibrate_cyclecounter_ctr() 381 wrmsr(MSR_PERF_FIXED_CTR_CTRL, msr); in calibrate_cyclecounter_ctr() 383 msr = rdmsr(MSR_PERF_GLOBAL_CTRL) | MSR_PERF_GLOBAL_CTR1_EN; in calibrate_cyclecounter_ctr() 384 wrmsr(MSR_PERF_GLOBAL_CTRL, msr); in calibrate_cyclecounter_ctr() 390 msr = rdmsr(MSR_PERF_FIXED_CTR_CTRL); in calibrate_cyclecounter_ctr() 392 wrmsr(MSR_PERF_FIXED_CTR_CTRL, msr); in calibrate_cyclecounter_ctr() 394 msr = rdmsr(MSR_PERF_GLOBAL_CTRL); in calibrate_cyclecounter_ctr() 395 msr &= ~MSR_PERF_GLOBAL_CTR1_EN; in calibrate_cyclecounter_ctr() [all …]
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/openbsd/sys/arch/arm/include/ |
H A D | frame.h | 187 msr cpsr_c, r0 ;\ 193 msr cpsr_c, r4 /* Restore interrupts */ ;\ 240 msr spsr_fsxc, r0; \ 264 msr cpsr_c, r2; /* Punch into SVC mode */ \ 271 msr spsr_fsxc, r3; /* Restore correct spsr */ \ 289 msr spsr_fsxc, r0; /* restore SPSR */ \
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/openbsd/sys/dev/mii/ |
H A D | urlphy.c | 226 int msr, bmsr, bmcr; in urlphy_status() local 237 msr = PHY_READ(sc, URLPHY_MSR) | PHY_READ(sc, URLPHY_MSR); in urlphy_status() 238 if (msr & URLPHY_MSR_LINK) in urlphy_status() 253 if (msr & URLPHY_MSR_SPEED_100) in urlphy_status() 258 if (msr & URLPHY_MSR_DUPLEX) in urlphy_status()
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