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Searched refs:pic_width (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_dsc.c171 if (dsc_cfg->pic_width > dsc20->max_image_width) in dsc2_validate_stream()
300 DC_LOG_DSC("\tpic_width %d", pps->pic_width); in dsc_log_pps()
376 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config()
387 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()
405 dsc_reg_vals->pps.pic_width = dsc_cfg->pic_width; in dsc_prepare_config()
415 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
540 reg_vals->pps.pic_width = 0; in dsc_init_reg_values()
598 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
647 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
H A Ddcn20_resource.c1677 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()
/openbsd/sys/dev/pci/drm/amd/display/dc/dsc/
H A Ddc_dsc.c852 int pic_width; in setup_dsc_config() local
865 pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; in setup_dsc_config()
871 if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width) in setup_dsc_config()
944 if (pic_width % max_slices_h == 0) in setup_dsc_config()
954 min_slices_h = pic_width / dsc_common_caps.max_slice_width; in setup_dsc_config()
955 if (pic_width % dsc_common_caps.max_slice_width) in setup_dsc_config()
970 if (pic_width % min_slices_h != 0) in setup_dsc_config()
1012 slice_width = pic_width / num_slices_h; in setup_dsc_config()
H A Drc_calc_dpi.c39 to->pic_width = from->pic_width; in copy_pps_fields()
/openbsd/sys/dev/pci/drm/include/drm/display/
H A Ddrm_dsc.h110 u16 pic_width; member
348 __be16 pic_width; member
/openbsd/sys/dev/pci/drm/amd/display/dc/inc/hw/
H A Ddsc.h38 uint32_t pic_width; member
/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_vdsc.c249 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()
250 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()
444 DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); in intel_dsc_pps_configure()
673 DSC_SLICE_PER_LINE((vdsc_cfg->pic_width / num_vdsc_instances) / in intel_dsc_pps_configure()
H A Dintel_vdsc_regs.h126 #define DSC_PIC_WIDTH(pic_width) ((pic_width) << 16) argument
H A Dicl_dsi.c1600 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
/openbsd/sys/dev/pci/drm/display/
H A Ddrm_dsc_helper.c144 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c112 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
131 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
/openbsd/sys/dev/pci/drm/amd/display/dc/link/
H A Dlink_dpms.c792 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in link_set_dsc_on_stream()
810 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream()
893 …dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h… in link_set_dsc_pps_packet()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c1020 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
1039 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()