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Searched refs:pptable (Results 1 – 25 of 28) sorted by relevance

12

/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_processpptables.c452 pptable->dBtcGbGfxCksOn.a,
453 pptable->dBtcGbGfxCksOn.b,
454 pptable->dBtcGbGfxCksOn.c);
460 pptable->dBtcGbGfxAfll.a,
461 pptable->dBtcGbGfxAfll.b,
462 pptable->dBtcGbGfxAfll.c);
464 pptable->dBtcGbSoc.a,
465 pptable->dBtcGbSoc.b,
466 pptable->dBtcGbSoc.c);
960 kfree(hwmgr->pptable); in vega20_pp_tables_uninitialize()
[all …]
H A Dprocess_pptables_v1_0.c205 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_platform_power_management_table()
484 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_pcie_table()
762 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_gpio_table()
794 (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_clock_voltage_dependency()
1148 PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), in pp_tables_v1_0_initialize()
1193 (struct phm_ppt_v1_information *)(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1231 kfree(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1232 hwmgr->pptable = NULL; in pp_tables_v1_0_uninitialize()
1315 + le16_to_cpu(pptable->usVCEStateTableOffset)); in ppt_get_vce_state_table_entry_v1_0()
1317 + le16_to_cpu(pptable->usSclkDependencyTableOffset)); in ppt_get_vce_state_table_entry_v1_0()
[all …]
H A Dvega12_processpptables.c195 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
266 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL); in vega12_pp_tables_initialize()
267 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega12_pp_tables_initialize()
293 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega12_pp_tables_uninitialize()
310 kfree(hwmgr->pptable); in vega12_pp_tables_uninitialize()
311 hwmgr->pptable = NULL; in vega12_pp_tables_uninitialize()
H A Dvega10_hwmgr.c197 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_set_features_platform_caps()
307 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_odn_initial_default_setting()
531 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_get_socclk_for_voltage_evv()
568 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_get_evv_voltages()
673 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_patch_voltage_dependency_tables_with_lookup_table()
1174 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_construct_voltage_tables()
1927 (hwmgr->pptable); in vega10_populate_single_display_type()
4759 gen_speed = pptable->PcieGenSpeed[i]; in vega10_emit_clock_levels()
4760 lane_width = pptable->PcieLaneCount[i]; in vega10_emit_clock_levels()
4903 gen_speed = pptable->PcieGenSpeed[i]; in vega10_print_clock_levels()
[all …]
H A Dvega10_processpptables.c789 (struct phm_ppt_v2_information *)(hwmgr->pptable); in get_pcie_table()
877 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_powerplay_extended_tables()
1065 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_dpm_2_parameters()
1152 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v2_information), GFP_KERNEL); in vega10_pp_tables_initialize()
1154 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega10_pp_tables_initialize()
1199 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1237 kfree(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1238 hwmgr->pptable = NULL; in vega10_pp_tables_uninitialize()
H A Dsmu7_hwmgr.c320 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_construct_voltage_tables()
639 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_default_pcie_table()
871 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_dpm_tables_v1()
937 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_odn_initial_default_setting()
982 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_voltage_range_from_vbios()
1010 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_check_dpm_table_updated()
2054 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_evv_voltages()
5170 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_sclks()
5207 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_mclks()
5252 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_sclks_with_latency()
[all …]
H A Dsmu_helper.c467 (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_get_sclk_for_voltage_evv()
496 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_initializa_dynamic_state_adjustment_rule_settings()
548 (struct phm_ppt_v1_information *)hwmgr->pptable; in phm_apply_dal_min_voltage_request()
H A Dvega12_thermal.c174 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_thermal_set_temperature_range()
H A Dvega20_thermal.c245 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_thermal_set_temperature_range()
H A Dvega20_hwmgr.c798 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_init_smc_table()
1051 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_set_feature_capabilities()
1251 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_initialize_default_settings()
2804 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega20_get_dal_power_level()
3374 PPTable_t *pptable = &(data->smc_state_table.pp_table); in vega20_print_clock_levels() local
3473 gen_speed = pptable->PcieGenSpeed[i]; in vega20_print_clock_levels()
3474 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
3487 pptable->LclkFreq[i], in vega20_print_clock_levels()
4233 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_get_thermal_temperature_range()
H A Dvega10_thermal.c363 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_thermal_set_temperature_range()
H A Dvega10_powertune.c1240 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_initialize_power_tune_defaults()
1291 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_enable_power_containment()
H A Dsmu10_hwmgr.c470 struct smu10_voltage_dependency_table **pptable, in smu10_get_clock_voltage_dependency_table() argument
488 *pptable = ptable; in smu10_get_clock_voltage_dependency_table()
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dsienna_cichlid_ppt.c2884 pptable->dBtcGbGfxPll.a, in beige_goby_dump_pptable()
2885 pptable->dBtcGbGfxPll.b, in beige_goby_dump_pptable()
2886 pptable->dBtcGbGfxPll.c); in beige_goby_dump_pptable()
2892 pptable->dBtcGbSoc.a, in beige_goby_dump_pptable()
2893 pptable->dBtcGbSoc.b, in beige_goby_dump_pptable()
2894 pptable->dBtcGbSoc.c); in beige_goby_dump_pptable()
3522 pptable->dBtcGbGfxPll.a, in sienna_cichlid_dump_pptable()
3523 pptable->dBtcGbGfxPll.b, in sienna_cichlid_dump_pptable()
3530 pptable->dBtcGbSoc.a, in sienna_cichlid_dump_pptable()
3531 pptable->dBtcGbSoc.b, in sienna_cichlid_dump_pptable()
[all …]
H A Darcturus_ppt.c1341 if (!pptable) { in arcturus_get_power_limit()
1849 pptable->dBtcGbGfxPll.a, in arcturus_dump_pptable()
1850 pptable->dBtcGbGfxPll.b, in arcturus_dump_pptable()
1851 pptable->dBtcGbGfxPll.c); in arcturus_dump_pptable()
1853 pptable->dBtcGbGfxAfll.a, in arcturus_dump_pptable()
1854 pptable->dBtcGbGfxAfll.b, in arcturus_dump_pptable()
1855 pptable->dBtcGbGfxAfll.c); in arcturus_dump_pptable()
1857 pptable->dBtcGbSoc.a, in arcturus_dump_pptable()
1858 pptable->dBtcGbSoc.b, in arcturus_dump_pptable()
1859 pptable->dBtcGbSoc.c); in arcturus_dump_pptable()
[all …]
H A Dnavi10_ppt.c1237 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
1357 pptable->LclkFreq[i], in navi10_emit_clk_levels()
1561 pptable->LclkFreq[i], in navi10_print_clk_levels()
1918 smu->fan_max_rpm = pptable->FanMaximumRpm; in navi10_get_fan_parameters()
2205 *(uint32_t *)data = pptable->FanMaximumRpm; in navi10_read_sensor()
2309 range->max = pptable->TedgeLimit * in navi10_get_thermal_temperature_range()
2317 range->mem_crit_max = pptable->TmemLimit * in navi10_get_thermal_temperature_range()
2363 if (!pptable) { in navi10_get_power_limit()
2410 ((pptable->PcieGenSpeed[i] <= pcie_gen_cap) ? (pptable->PcieGenSpeed[i] << 8) : in navi10_update_pcie_parameters()
2412 pptable->PcieLaneCount[i] : pcie_width_cap); in navi10_update_pcie_parameters()
[all …]
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c333 struct PPTable_t *pptable = in smu_v13_0_6_setup_driver_pptable() local
338 if (!pptable->Init) { in smu_v13_0_6_setup_driver_pptable()
379 pptable->Init = true; in smu_v13_0_6_setup_driver_pptable()
390 struct PPTable_t *pptable = in smu_v13_0_6_get_dpm_ultimate_freq() local
399 if (pptable->Init) in smu_v13_0_6_get_dpm_ultimate_freq()
404 if (pptable->Init) in smu_v13_0_6_get_dpm_ultimate_freq()
408 if (pptable->Init) in smu_v13_0_6_get_dpm_ultimate_freq()
412 if (pptable->Init) in smu_v13_0_6_get_dpm_ultimate_freq()
416 if (pptable->Init) in smu_v13_0_6_get_dpm_ultimate_freq()
420 if (pptable->Init) in smu_v13_0_6_get_dpm_ultimate_freq()
[all …]
H A Dsmu_v13_0_0_ppt.c343 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_check_powerplay_table() local
347 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_check_powerplay_table()
349 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_0_check_powerplay_table()
573 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_set_default_dpm_table()
729 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_dump_pptable()
1064 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_is_od_feature_supported()
1076 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_get_od_setting_limits()
1078 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_0_get_od_setting_limits()
1877 pptable->SkuTable.DriverReportedClocks; in smu_v13_0_0_populate_umd_state_clk()
1974 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_enable_mgpu_fan_boost()
[all …]
H A Dsmu_v13_0_7_ppt.c719 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_7_dump_pptable()
1043 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_is_od_feature_supported() local
1045 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_7_is_od_feature_supported()
1055 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_get_od_setting_limits() local
1057 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_7_get_od_setting_limits()
1059 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_7_get_od_setting_limits()
1652 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_get_thermal_temperature_range() local
1853 PPTable_t *pptable = table_context->driver_pptable; in smu_v13_0_7_populate_umd_state_clk() local
1855 pptable->SkuTable.DriverReportedClocks; in smu_v13_0_7_populate_umd_state_clk()
1930 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_7_enable_mgpu_fan_boost()
[all …]
H A Daldebaran_ppt.c313 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_set_default_dpm_table() local
337 dpm_table->dpm_levels[0].value = pptable->GfxclkFmin; in aldebaran_set_default_dpm_table()
339 dpm_table->dpm_levels[1].value = pptable->GfxclkFmax; in aldebaran_set_default_dpm_table()
1053 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_get_thermal_temperature_range() local
1060 range->hotspot_crit_max = pptable->ThotspotLimit * in aldebaran_get_thermal_temperature_range()
1064 range->mem_crit_max = pptable->TmemLimit * in aldebaran_get_thermal_temperature_range()
1196 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_get_power_limit() local
1223 if (!pptable) { in aldebaran_get_power_limit()
1228 power_limit = pptable->PptLimit; in aldebaran_get_power_limit()
1238 if (pptable) in aldebaran_get_power_limit()
[all …]
/openbsd/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c335 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
368 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
400 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
435 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
507 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
544 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
817 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
870 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
986 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
1090 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
[all …]
H A Dpolaris10_smumgr.c434 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_parameters_in_dpm_table()
508 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_tdc_limit()
588 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_vddc_base_leakage_sidd()
748 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_cac_table()
783 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_ulv_level()
963 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_graphic_level()
1042 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_all_graphic_levels()
1158 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_memory_level()
1257 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_mvdd_value()
1284 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_smc_acpi_level()
[all …]
H A Dfiji_smumgr.c471 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
493 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
587 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
673 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
761 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
801 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
944 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
1006 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1166 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1276 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
[all …]
H A Dtonga_smumgr.c253 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_get_dependency_volt_by_clk()
398 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_cac_tables()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_ulv_level()
1148 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_mvdd_value()
1583 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_clock_stretcher_data_table()
1833 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_bapm_parameters_in_dpm_table()
1894 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_tdc_limit()
1978 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_bapm_vddc_base_leakage_sidd()
2228 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_init_smc_table()
2681 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_update_uvd_smc_table()
[all …]
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/
H A Dsmu_cmn.c919 void *pptable = smu->smu_table.driver_pptable; in smu_cmn_write_pptable() local
924 pptable, in smu_cmn_write_pptable()
960 void *pptable = smu->smu_table.combo_pptable; in smu_cmn_get_combo_pptable() local
965 pptable, in smu_cmn_get_combo_pptable()

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