| /openbsd/sys/dev/pci/drm/radeon/ |
| H A D | radeon_asic.h | 61 int r100_init(struct radeon_device *rdev);
62 void r100_fini(struct radeon_device *rdev);
63 int r100_suspend(struct radeon_device *rdev);
64 int r100_resume(struct radeon_device *rdev);
74 int r100_irq_set(struct radeon_device *rdev);
261 int rs690_init(struct radeon_device *rdev);
302 int r520_init(struct radeon_device *rdev);
309 int r600_init(struct radeon_device *rdev);
709 int si_init(struct radeon_device *rdev);
710 void si_fini(struct radeon_device *rdev);
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| H A D | radeon_device.c | 849 r = rdev->pll_rreg(rdev, reg); in cail_pll_read()
866 rdev->pll_wreg(rdev, reg, val); in cail_pll_write()
883 r = rdev->mc_rreg(rdev, reg); in cail_mc_read()
900 rdev->mc_wreg(rdev, reg, val); in cail_mc_write()
1419 rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); in radeon_device_init()
1433 rdev->rio_mem = pci_iomap(rdev->pdev, i, rdev->rio_mem_size); in radeon_device_init()
1550 pci_iounmap(rdev->pdev, rdev->rio_mem); in radeon_device_fini()
1555 bus_space_unmap(rdev->iot, rdev->rio_mem, rdev->rio_mem_size); in radeon_device_fini()
1559 bus_space_unmap(rdev->memt, rdev->rmmio_bsh, rdev->rmmio_size); in radeon_device_fini()
1672 rdev->asic->asic_reset(rdev, true); in radeon_suspend_kms()
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| H A D | radeon_pm.c | 84 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
167 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
615 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); in radeon_hwmon_set_pwm1_enable()
764 vddc = rdev->asic->dpm.get_current_vddc(rdev); in radeon_hwmon_show_vddc()
1088 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1279 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1313 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1314 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1335 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1448 if (rdev->bios && rdev->is_atom_bios) in radeon_pm_init_dpm()
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| H A D | r420.c | 161 rdev->num_gb_pipes, rdev->num_z_pipes); in r420_pipes_init()
217 radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch); in r420_cp_errata_init()
239 radeon_scratch_free(rdev, rdev->config.r300.resync_scratch); in r420_cp_errata_fini()
284 r100_irq_set(rdev); in r420_startup()
356 r100_cp_fini(rdev); in r420_fini()
373 kfree(rdev->bios); in r420_fini()
374 rdev->bios = NULL; in r420_fini()
406 dev_warn(rdev->dev, in r420_init()
425 r300_mc_init(rdev); in r420_init()
426 r420_debugfs(rdev); in r420_init()
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| H A D | r520.c | 81 r420_pipes_init(rdev); in r520_gpu_init()
126 radeon_vram_location(rdev, &rdev->mc, 0); in r520_mc_init()
129 radeon_gtt_location(rdev, &rdev->mc); in r520_mc_init()
175 r520_gpu_init(rdev); in r520_startup()
202 rs600_irq_set(rdev); in r520_startup()
276 dev_warn(rdev->dev, in r520_init()
285 if (!radeon_card_posted(rdev) && rdev->bios) { in r520_init()
299 r520_mc_init(rdev); in r520_init()
300 rv515_debugfs(rdev); in r520_init()
313 radeon_pm_init(rdev); in r520_init()
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| H A D | radeon_gart.c | 105 dmah = drm_dmamem_alloc(rdev->dmat, rdev->gart.table_size, in radeon_gart_table_ram_alloc()
113 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size); in radeon_gart_table_ram_alloc()
140 dma_free_coherent(&rdev->pdev->dev, rdev->gart.table_size, in radeon_gart_table_ram_free()
141 (void *)rdev->gart.ptr, rdev->gart.table_addr); in radeon_gart_table_ram_free()
158 drm_dmamem_free(rdev->dmat, rdev->gart.dmah); in radeon_gart_table_ram_free()
179 r = radeon_bo_create(rdev, rdev->gart.table_size, in radeon_gart_table_vram_alloc()
212 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr); in radeon_gart_table_vram_pin()
303 rdev->gart.pages_entry[t] = rdev->dummy_page.entry; in radeon_gart_unbind()
393 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); in radeon_gart_init()
409 rdev->gart.pages_entry[i] = rdev->dummy_page.entry; in radeon_gart_init()
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| H A D | radeon_irq_kms.c | 59 if (!rdev->irq.installed) in radeon_driver_irq_handler_kms()
143 radeon_irq_set(rdev); in radeon_driver_irq_preinstall_kms()
182 if (rdev == NULL) { in radeon_driver_irq_uninstall_kms()
197 radeon_irq_set(rdev); in radeon_driver_irq_uninstall_kms()
336 r = drm_vblank_init(rdev->ddev, rdev->num_crtc); in radeon_irq_kms_init()
342 rdev->msi_enabled = 0; in radeon_irq_kms_init()
357 r = radeon_irq_install(rdev, rdev->pdev->irq); in radeon_irq_kms_init()
518 radeon_irq_set(rdev); in radeon_irq_kms_enable_afmt()
540 radeon_irq_set(rdev); in radeon_irq_kms_disable_afmt()
563 radeon_irq_set(rdev); in radeon_irq_kms_enable_hpd()
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| H A D | rs400.c | 84 if (rdev->gart.ptr) { in rs400_gart_init()
106 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rs400_gart_init()
145 if (rdev->family == CHIP_RS690 || (rdev->family == CHIP_RS740)) { in rs400_gart_enable()
154 if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { in rs400_gart_enable()
178 if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { in rs400_gart_enable()
277 radeon_vram_location(rdev, &rdev->mc, base); in rs400_mc_init()
278 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1; in rs400_mc_init()
279 radeon_gtt_location(rdev, &rdev->mc); in rs400_mc_init()
319 if (rdev->family == CHIP_RS690 || (rdev->family == CHIP_RS740)) { in rs400_debugfs_gart_info_show()
512 kfree(rdev->bios); in rs400_fini()
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| H A D | ni.c | 631 if (!rdev->mc_fw) in ni_mc_load_microcode()
763 err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); in ni_init_microcode()
774 err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); in ni_init_microcode()
784 err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); in ni_init_microcode()
796 err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); in ni_init_microcode()
808 err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); in ni_init_microcode()
1515 if (!rdev->me_fw || !rdev->pfp_fw) in cayman_cp_load_microcode()
2162 if (!(rdev->flags & RADEON_IS_IGP) && !rdev->pm.dpm_enabled) { in cayman_startup()
2389 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { in cayman_init()
2397 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) { in cayman_init()
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| H A D | r600.c | 1326 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in r600_mc_program()
1427 radeon_vram_location(rdev, &rdev->mc, base); in r600_vram_gtt_location()
1468 rdev->mc.aper_base = rdev->fb_aper_offset; in r600_mc_init()
1469 rdev->mc.aper_size = rdev->fb_aper_size; in r600_mc_init()
1473 rdev->mc.visible_vram_size = rdev->mc.aper_size; in r600_mc_init()
1474 r600_vram_gtt_location(rdev, &rdev->mc); in r600_mc_init()
2649 if (!rdev->me_fw || !rdev->pfp_fw) in r600_cp_load_microcode()
3299 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { in r600_init()
3474 rdev->ih.ptr_mask = rdev->ih.ring_size - 1; in r600_ih_ring_init()
3484 r = radeon_bo_create(rdev, rdev->ih.ring_size, in r600_ih_ring_alloc()
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| H A D | rv770.c | 1032 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in rv770_mc_program()
1083 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); in r700_cp_stop()
1094 if (!rdev->me_fw || !rdev->pfp_fw) in rv770_cp_load_microcode()
1157 if ((rdev->family == CHIP_RV710) || (rdev->family == CHIP_RV730)) in rv770_set_clk_bypass_mode()
1636 radeon_vram_location(rdev, &rdev->mc, 0); in r700_vram_gtt_location()
1675 rdev->mc.aper_base = rdev->fb_aper_offset; in rv770_mc_init()
1676 rdev->mc.aper_size = rdev->fb_aper_size; in rv770_mc_init()
1680 rdev->mc.visible_vram_size = rdev->mc.aper_size; in rv770_mc_init()
1681 r700_vram_gtt_location(rdev, &rdev->mc); in rv770_mc_init()
1707 r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); in rv770_uvd_init()
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| H A D | radeon_kms.c | 66 if (rdev == NULL) in radeon_driver_unload_kms()
69 if (rdev->rmmio == NULL) in radeon_driver_unload_kms()
77 radeon_acpi_fini(rdev); in radeon_driver_unload_kms()
82 if (rdev->agp) in radeon_driver_unload_kms()
84 kfree(rdev->agp); in radeon_driver_unload_kms()
85 rdev->agp = NULL; in radeon_driver_unload_kms()
88 kfree(rdev); in radeon_driver_unload_kms()
112 if (rdev == NULL) { in radeon_driver_load_kms()
123 if (rdev->agp) { in radeon_driver_load_kms()
270 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) in radeon_info_ioctl()
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| H A D | radeon.h | 2737 #define radeon_init(rdev) (rdev)->asic->init((rdev)) argument
2738 #define radeon_fini(rdev) (rdev)->asic->fini((rdev)) argument
2739 #define radeon_resume(rdev) (rdev)->asic->resume((rdev)) argument
2740 #define radeon_suspend(rdev) (rdev)->asic->suspend((rdev)) argument
2763 #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev)) argument
2791 #define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) argument
2792 #define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) argument
2795 #define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) argument
2796 #define radeon_pm_misc(rdev) (rdev)->asic->pm.misc((rdev)) argument
2808 #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev)) argument
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| H A D | radeon_fence.c | 145 (*fence)->rdev = rdev; in radeon_fence_emit()
275 rdev = fence_drv->rdev; in radeon_fence_check_lockup()
357 struct radeon_device *rdev = fence->rdev; in radeon_fence_is_signaled() local
387 struct radeon_device *rdev = fence->rdev; in radeon_fence_enable_signaling() local
822 if (rdev->wb.use_event || !radeon_ring_supports_scratch_reg(rdev, &rdev->ring[ring])) { in radeon_fence_driver_start_ring()
826 rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; in radeon_fence_driver_start_ring()
827 rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + in radeon_fence_driver_start_ring()
846 rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; in radeon_fence_driver_start_ring()
847 rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index; in radeon_fence_driver_start_ring()
879 rdev->fence_drv[ring].rdev = rdev; in radeon_fence_driver_init_ring()
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| H A D | rs600.c | 559 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in rs600_gart_init()
776 rs600_irq_ack(rdev); in rs600_irq_disable()
884 rdev->mc.aper_base = rdev->fb_aper_offset; in rs600_mc_init()
885 rdev->mc.aper_size = rdev->fb_aper_size; in rs600_mc_init()
889 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; in rs600_mc_init()
890 rdev->mc.visible_vram_size = rdev->mc.aper_size; in rs600_mc_init()
894 radeon_vram_location(rdev, &rdev->mc, base); in rs600_mc_init()
896 radeon_gtt_location(rdev, &rdev->mc); in rs600_mc_init()
1087 r100_cp_fini(rdev); in rs600_fini()
1096 kfree(rdev->bios); in rs600_fini()
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| H A D | rv6xx_dpm.c | 854 r600_set_at(rdev, in rv6xx_program_at()
883 r600_set_vrc(rdev, 0); in rv6xx_clear_vc()
1598 r600_start_dpm(rdev); in rv6xx_dpm_enable()
1623 rv6xx_clear_vc(rdev); in rv6xx_dpm_disable()
1647 radeon_irq_set(rdev); in rv6xx_dpm_disable()
1653 r600_stop_dpm(rdev); in rv6xx_dpm_disable()
1667 rv6xx_clear_vc(rdev); in rv6xx_dpm_set_power_state()
1856 if ((rdev->family == CHIP_RV610) || (rdev->family == CHIP_RV630)) { in rv6xx_parse_pplib_clock_info()
1893 if (!rdev->pm.dpm.ps) in rv6xx_parse_power_table()
1914 rv6xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in rv6xx_parse_power_table()
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| H A D | evergreen.c | 1871 if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { in evergreen_line_buffer_adjust()
2876 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in evergreen_mc_program()
2972 if (!rdev->me_fw || !rdev->pfp_fw) in evergreen_cp_load_microcode()
3750 rdev->mc.aper_base = rdev->fb_aper_offset; in evergreen_mc_init()
3751 rdev->mc.aper_size = rdev->fb_aper_size; in evergreen_mc_init()
3764 rdev->mc.visible_vram_size = rdev->mc.aper_size; in evergreen_mc_init()
3765 r700_vram_gtt_location(rdev, &rdev->mc); in evergreen_mc_init()
4695 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask; in evergreen_get_ih_wptr()
4720 if (!rdev->ih.enabled || rdev->shutdown) in evergreen_irq_process()
5238 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) { in evergreen_init()
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| H A D | rs690.c | 134 rdev->pm.ht_bandwidth.full = dfixed_mul(rdev->pm.igp_ht_link_clk, in rs690_pm_info()
136 rdev->pm.ht_bandwidth.full = dfixed_div(rdev->pm.ht_bandwidth, tmp); in rs690_pm_info()
160 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; in rs690_mc_init()
161 rdev->mc.aper_base = rdev->fb_aper_offset; in rs690_mc_init()
162 rdev->mc.aper_size = rdev->fb_aper_size; in rs690_mc_init()
163 rdev->mc.visible_vram_size = rdev->mc.aper_size; in rs690_mc_init()
175 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; in rs690_mc_init()
199 radeon_vram_location(rdev, &rdev->mc, base); in rs690_mc_init()
200 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1; in rs690_mc_init()
201 radeon_gtt_location(rdev, &rdev->mc); in rs690_mc_init()
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| H A D | r300.c | 133 if (rdev->gart.robj) { in rv370_pcie_gart_init()
143 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rv370_pcie_gart_init()
365 if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) || in r300_gpu_init()
366 (rdev->family == CHIP_R350 && rdev->pdev->device != 0x4148)) { in r300_gpu_init()
410 rdev->num_gb_pipes, rdev->num_z_pipes); in r300_gpu_init()
492 radeon_vram_location(rdev, &rdev->mc, base); in r300_mc_init()
495 radeon_gtt_location(rdev, &rdev->mc); in r300_mc_init()
1364 if ((rdev->family == CHIP_RV350) || (rdev->family == CHIP_RV380)) in r300_clock_startup()
1497 kfree(rdev->bios); in r300_fini()
1498 rdev->bios = NULL; in r300_fini()
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| H A D | si.c | 3479 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw) in si_cp_load_microcode()
4200 radeon_vram_location(rdev, &rdev->mc, 0); in si_vram_gtt_location()
4253 rdev->mc.aper_base = rdev->fb_aper_offset; in si_mc_init()
4254 rdev->mc.aper_size = rdev->fb_aper_size; in si_mc_init()
4264 rdev->mc.real_vram_size = rdev->mc.mc_vram_size; in si_mc_init()
4265 rdev->mc.visible_vram_size = rdev->mc.aper_size; in si_mc_init()
4266 si_vram_gtt_location(rdev, &rdev->mc); in si_mc_init()
5912 si_enable_lbpw(rdev, si_lbpw_supported(rdev)); in si_rlc_resume()
6259 if (!rdev->ih.enabled || rdev->shutdown) in si_irq_process()
6877 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || in si_init()
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| H A D | kv_dpm.c | 533 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_unforce_levels()
1121 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_enable()
1170 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_disable()
1510 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_dpm_powergate_acp()
1681 ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power); in kv_dpm_set_power_state()
1851 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_force_dpm_highest()
1871 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_force_dpm_lowest()
1979 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()
1980 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
2234 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_program_nbps_index_settings()
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| H A D | cik.c | 3888 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw) in cik_cp_gfx_load_microcode()
4390 rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8; in cik_mec_init()
4605 cik_srbm_select(rdev, rdev->ring[idx].me, in cik_cp_compute_resume()
5374 rdev->mc.aper_base = rdev->fb_aper_offset; in cik_mc_init()
5375 rdev->mc.aper_size = rdev->fb_aper_size; in cik_mc_init()
5380 si_vram_gtt_location(rdev, &rdev->mc); in cik_mc_init()
7553 if (!rdev->ih.enabled || rdev->shutdown) in cik_irq_process()
8601 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || in cik_init()
8602 !rdev->mec_fw || !rdev->sdma_fw || !rdev->rlc_fw) { in cik_init()
8610 if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || in cik_init()
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| H A D | rs780_dpm.c | 122 r600_set_tc(rdev, i, 0, 0); in rs780_initialize_dpm_parameters()
125 r600_set_vrc(rdev, 0); in rs780_initialize_dpm_parameters()
611 rs780_start_dpm(rdev); in rs780_dpm_enable()
620 rs780_program_at(rdev); in rs780_dpm_enable()
645 radeon_irq_set(rdev); in rs780_dpm_disable()
688 rs780_program_at(rdev); in rs780_dpm_display_configuration_changed()
810 if (!rdev->pm.dpm.ps) in rs780_parse_power_table()
835 rs780_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in rs780_parse_power_table()
859 rdev->pm.dpm.priv = pi; in rs780_dpm_init()
934 radeon_dpm_fini(rdev); in rs780_dpm_init()
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| H A D | radeon_ib.c | 198 if (rdev->ib_pool_ready) { in radeon_ib_pool_init()
203 r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo, in radeon_ib_pool_init()
211 r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo, in radeon_ib_pool_init()
219 r = radeon_sa_bo_manager_start(rdev, &rdev->ring_tmp_bo); in radeon_ib_pool_init()
224 rdev->ib_pool_ready = true; in radeon_ib_pool_init()
225 radeon_debugfs_sa_init(rdev); in radeon_ib_pool_init()
239 if (rdev->ib_pool_ready) { in radeon_ib_pool_fini()
240 radeon_sa_bo_manager_suspend(rdev, &rdev->ring_tmp_bo); in radeon_ib_pool_fini()
241 radeon_sa_bo_manager_fini(rdev, &rdev->ring_tmp_bo); in radeon_ib_pool_fini()
242 rdev->ib_pool_ready = false; in radeon_ib_pool_fini()
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| H A D | btc_dpm.c | 1748 r7xx_stop_smc(rdev); in btc_stop_smc()
2282 btc_disable_ulv(rdev);
2425 rv770_setup_bsp(rdev); in btc_dpm_enable()
2427 rv770_program_tp(rdev); in btc_dpm_enable()
2460 r7xx_start_smc(rdev); in btc_dpm_enable()
2486 btc_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in btc_dpm_enable()
2499 rv770_clear_vc(rdev); in btc_dpm_disable()
2510 radeon_irq_set(rdev); in btc_dpm_disable()
2522 rv770_stop_dpm(rdev); in btc_dpm_disable()
2524 btc_stop_smc(rdev); in btc_dpm_disable()
[all …]
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