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Searched refs:reg (Results 1 – 25 of 2047) sorted by relevance

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/openbsd/sys/arch/hppa/include/
H A Dasm.h35 r0 .reg %r0
36 r1 .reg %r1
37 r2 .reg %r2
38 r3 .reg %r3
39 r4 .reg %r4
40 r5 .reg %r5
41 r6 .reg %r6
42 r7 .reg %r7
43 r8 .reg %r8
44 r9 .reg %r9
[all …]
/openbsd/gnu/llvm/compiler-rt/lib/asan/
H A Dasan_rtl_x86_64.S9 #define NAME(n, reg, op, s, i) n##_##op##_##i##_##s##_##reg argument
11 #define FNAME(reg, op, s, i) NAME(__asan_check, reg, op, s, i) argument
12 #define RLABEL(reg, op, s, i) NAME(.return, reg, op, s, i) argument
13 #define CLABEL(reg, op, s, i) NAME(.check, reg, op, s, i) argument
14 #define FLABEL(reg, op, s, i) NAME(.fail, reg, op, s, i) argument
22 FNAME(reg, op, s, i): ;\
33 RLABEL(reg, op, s, add): ;\
37 CLABEL(reg, op, 1, i): ;\
48 CLABEL(reg, op, 2, i): ;\
60 CLABEL(reg, op, 4, i): ;\
[all …]
/openbsd/gnu/usr.bin/binutils-2.17/gas/
H A Dbfin-parse.c3244 …OMPL ((yyvsp[-16].reg), (yyvsp[-14].reg)) && IS_HCOMPL ((yyvsp[-10].reg), (yyvsp[-3].reg)) && IS_H…
3567 …G_SAME ((yyvsp[-6].reg), (yyvsp[-4].reg)) && REG_SAME ((yyvsp[-2].reg), (yyvsp[0].reg)) && !REG_SA…
3580 …G_SAME ((yyvsp[-6].reg), (yyvsp[-4].reg)) && REG_SAME ((yyvsp[-2].reg), (yyvsp[0].reg)) && !REG_SA…
3748 …SAME ((yyvsp[-10].reg), (yyvsp[-9].reg)) && REG_SAME ((yyvsp[-4].reg), (yyvsp[-3].reg)) && !REG_SA…
6032 (yyval.reg) = (yyvsp[0].reg);
6039 (yyval.reg) = (yyvsp[0].reg);
6491 (yyval.reg) = (yyvsp[-1].reg);
6498 (yyval.reg) = (yyvsp[-2].reg);
6694 (yyval.reg) = (yyvsp[-1].reg);
6701 (yyval.reg) = (yyvsp[-1].reg);
[all …]
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsoc15_common.h36 #define SOC15_REG_OFFSET(ip, inst, reg) (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) argument
38 (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg)+(offset))
43 WREG32(reg, value))
48 RREG32(reg))
53 adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg, \
55 ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field), \
67 __RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \
70 #define RREG32_SOC15_IP(ip, reg) __RREG32_SOC15_RLC__(reg, 0, ip##_HWIP, 0) argument
75 __RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \
102 (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg)), \
[all …]
/openbsd/sys/dev/ic/
H A Dar9285.c216 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9285_init_from_rom()
220 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_DB, in ar9285_init_from_rom()
228 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9285_init_from_rom()
232 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_DB, in ar9285_init_from_rom()
254 reg = RW(reg, AR9285_PHY_ANT_DIV_CTL_ALL, 0); in ar9285_init_from_rom()
255 reg = RW(reg, AR9285_PHY_ANT_DIV_CTL, in ar9285_init_from_rom()
257 reg = RW(reg, AR9285_PHY_ANT_DIV_ALT_LNACONF, in ar9285_init_from_rom()
261 reg = RW(reg, AR9285_PHY_ANT_DIV_ALT_GAINTB, in ar9285_init_from_rom()
393 reg = RW(reg, AR_PHY_TX_END_PA_ON, in ar9285_init_from_rom()
395 reg = RW(reg, AR_PHY_TX_END_DATA_START, in ar9285_init_from_rom()
[all …]
H A Dar9380.c363 reg = RW(reg, AR_PHY_65NM_CH0_BIAS1_0, 5); in ar9380_init_from_rom()
364 reg = RW(reg, AR_PHY_65NM_CH0_BIAS1_1, 5); in ar9380_init_from_rom()
365 reg = RW(reg, AR_PHY_65NM_CH0_BIAS1_2, 5); in ar9380_init_from_rom()
366 reg = RW(reg, AR_PHY_65NM_CH0_BIAS1_3, 5); in ar9380_init_from_rom()
367 reg = RW(reg, AR_PHY_65NM_CH0_BIAS1_4, 5); in ar9380_init_from_rom()
368 reg = RW(reg, AR_PHY_65NM_CH0_BIAS1_5, 5); in ar9380_init_from_rom()
372 reg = RW(reg, AR_PHY_65NM_CH0_BIAS2_0, 5); in ar9380_init_from_rom()
373 reg = RW(reg, AR_PHY_65NM_CH0_BIAS2_1, 5); in ar9380_init_from_rom()
374 reg = RW(reg, AR_PHY_65NM_CH0_BIAS2_2, 5); in ar9380_init_from_rom()
375 reg = RW(reg, AR_PHY_65NM_CH0_BIAS2_3, 5); in ar9380_init_from_rom()
[all …]
H A Dar9280.c228 reg = RW(reg, AR_AN_SYNTH9_REFDIVA, 1); in ar9280_set_synth()
274 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9280_init_from_rom()
278 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_DB, in ar9280_init_from_rom()
287 reg = RW(reg, AR9280_PHY_RXGAIN_TXRX_ATTEN, in ar9280_init_from_rom()
289 reg = RW(reg, AR9280_PHY_RXGAIN_TXRX_MARGIN, in ar9280_init_from_rom()
295 reg = RW(reg, AR_AN_RF2G1_CH0_OB, modal->ob); in ar9280_init_from_rom()
329 reg = RW(reg, AR_AN_TOP2_XPABIAS_LVL, 0); in ar9280_init_from_rom()
375 reg = RW(reg, AR_PHY_TX_END_DATA_START, in ar9280_init_from_rom()
406 reg = RW(reg, AR_PHY_FRAME_CTL_TX_CLIP, in ar9280_init_from_rom()
411 reg = RW(reg, AR_PHY_TX_DESIRED_SCALE_CCK, in ar9280_init_from_rom()
[all …]
H A Dar9287.c185 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, in ar9287_init_from_rom()
187 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, in ar9287_init_from_rom()
192 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, in ar9287_init_from_rom()
194 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9287_init_from_rom()
199 reg = RW(reg, AR9280_PHY_RXGAIN_TXRX_MARGIN, in ar9287_init_from_rom()
201 reg = RW(reg, AR9280_PHY_RXGAIN_TXRX_ATTEN, in ar9287_init_from_rom()
236 reg = RW(reg, AR9287_AN_RF2G3_DB1, modal->db1); in ar9287_init_from_rom()
237 reg = RW(reg, AR9287_AN_RF2G3_DB2, modal->db2); in ar9287_init_from_rom()
247 reg = RW(reg, AR9287_AN_RF2G3_DB1, modal->db1); in ar9287_init_from_rom()
248 reg = RW(reg, AR9287_AN_RF2G3_DB2, modal->db2); in ar9287_init_from_rom()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/inc/
H A Dreg_helper.h69 FN(reg, f1), v1,\
70 FN(reg, f2), v2)
74 FN(reg, f1), v1,\
75 FN(reg, f2), v2,\
76 FN(reg, f3), v3)
83 FN(reg, f4), v4)
92 FN(reg, f5), v5)
102 FN(reg, f6), v6)
113 FN(reg, f7), v7)
125 FN(reg, f8), v8)
[all …]
/openbsd/sys/arch/i386/pci/
H A Dpci_bus_fixup.c54 pcireg_t reg; in pci_bus_check() local
72 if (PCI_VENDOR(reg) == 0) in pci_bus_check()
75 qd = pci_lookup_quirkdata(PCI_VENDOR(reg), PCI_PRODUCT(reg)); in pci_bus_check()
78 if (PCI_HDRTYPE_MULTIFN(reg) || in pci_bus_check()
93 if (PCI_VENDOR(reg) == 0) in pci_bus_check()
161 pcireg_t reg; in pci_bus_assign() local
179 if (PCI_VENDOR(reg) == 0) in pci_bus_assign()
182 qd = pci_lookup_quirkdata(PCI_VENDOR(reg), PCI_PRODUCT(reg)); in pci_bus_assign()
200 if (PCI_VENDOR(reg) == 0) in pci_bus_assign()
211 reg &= 0xff000000; in pci_bus_assign()
[all …]
/openbsd/sys/dev/fdt/
H A Damlclock.c111 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
113 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
116 uint8_t reg; member
208 uint32_t reg, mux, div; in amlclock_get_cpu_freq() local
211 reg = HREAD4(sc, offset); in amlclock_get_cpu_freq()
247 uint32_t reg, div; in amlclock_set_cpu_freq() local
255 reg = HREAD4(sc, offset); in amlclock_set_cpu_freq()
375 uint32_t reg, div; in amlclock_set_pll_freq() local
420 uint32_t reg, mux, div; in amlclock_get_frequency() local
480 mux = (reg >> 9) & 0x7; in amlclock_get_frequency()
[all …]
H A Damlpciephy.c50 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
52 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
117 uint32_t reg; in amlpciephy_enable() local
153 reg |= (1 << 7); in amlpciephy_enable()
157 reg &= ~0xff0; in amlpciephy_enable()
158 reg |= 0x10; in amlpciephy_enable()
163 reg &= (1 << 6); in amlpciephy_enable()
172 reg &= ~0x3f80; in amlpciephy_enable()
174 reg &= ~0x7f; in amlpciephy_enable()
222 uint32_t reg; in amlpciephy_read() local
[all …]
H A Dsxiccmu.c48 uint16_t reg; member
597 if (OF_getpropintarray(node, "reg", reg, sizeof(reg)) == sizeof(reg)) { in sxiccmu_attach_clock()
598 error = bus_space_map(clock->sc_iot, reg[0], reg[1], 0, in sxiccmu_attach_clock()
692 uint32_t reg; in sxiccmu_pll6_enable() local
1462 div = H3_AHB0_CLK_PRE_DIV(reg) * H3_AHB0_CLK_RATIO(reg); in sxiccmu_h3_r_get_frequency()
1691 uint32_t reg; in sxiccmu_a10_set_frequency() local
1752 uint32_t reg; in sxiccmu_a10s_set_frequency() local
1833 uint32_t reg; in sxiccmu_a64_set_frequency() local
2215 int reg, bit; in sxiccmu_ccu_enable() local
2229 reg = sc->sc_gates[idx].reg; in sxiccmu_ccu_enable()
[all …]
H A Damldwusb.c110 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
112 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
148 uint32_t reg; in amldwusb_attach() local
175 reg = HREAD4(sc, USB_R1); in amldwusb_attach()
178 HWRITE4(sc, USB_R1, reg); in amldwusb_attach()
182 reg = HREAD4(sc, USB_R5); in amldwusb_attach()
185 HWRITE4(sc, USB_R5, reg); in amldwusb_attach()
218 uint32_t reg; in amldwusb_init_usb3() local
220 reg = HREAD4(sc, USB_R3); in amldwusb_init_usb3()
225 HWRITE4(sc, USB_R3, reg); in amldwusb_init_usb3()
[all …]
/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.h137 #define PHM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT argument
138 #define PHM_FIELD_MASK(reg, field) reg##__##field##_MASK argument
142 (PHM_FIELD_MASK(reg, field) & ((fieldval) << PHM_FIELD_SHIFT(reg, field))))
152 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)
156 reg, field)
160 reg, field)
164 cgs_read_register(device, mm##reg), reg, field, fieldval))
169 reg, field, fieldval))
174 reg, field, fieldval))
185 << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field))
[all …]
/openbsd/gnu/gcc/gcc/config/i386/
H A Dlinux-unwind.h70 fs->regs.reg[0].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
72 fs->regs.reg[1].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
74 fs->regs.reg[2].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
76 fs->regs.reg[3].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
78 fs->regs.reg[4].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
80 fs->regs.reg[5].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
82 fs->regs.reg[6].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
84 fs->regs.reg[8].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
86 fs->regs.reg[9].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
88 fs->regs.reg[10].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
[all …]
/openbsd/gnu/usr.bin/gcc/gcc/config/i386/
H A Dlinux64.h128 (FS)->regs.reg[0].how = REG_SAVED_OFFSET; \
130 (FS)->regs.reg[1].how = REG_SAVED_OFFSET; \
132 (FS)->regs.reg[2].how = REG_SAVED_OFFSET; \
134 (FS)->regs.reg[3].how = REG_SAVED_OFFSET; \
136 (FS)->regs.reg[4].how = REG_SAVED_OFFSET; \
138 (FS)->regs.reg[5].how = REG_SAVED_OFFSET; \
140 (FS)->regs.reg[6].how = REG_SAVED_OFFSET; \
142 (FS)->regs.reg[8].how = REG_SAVED_OFFSET; \
144 (FS)->regs.reg[9].how = REG_SAVED_OFFSET; \
198 (FS)->regs.reg[0].how = REG_SAVED_OFFSET; \
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dmub/src/
H A Ddmub_reg.h43 #define REG(reg) (REGS)->offset.reg argument
51 #define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg))) argument
67 FN(reg, f1), v1, \
68 FN(reg, f2), v2)
72 FN(reg, f1), v1, \
74 FN(reg, f3), v3)
81 FN(reg, f4), v4)
94 FN(reg, f1), v1,\
95 FN(reg, f2), v2)
101 FN(reg, f3), v3)
[all …]
/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_de.h14 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read() argument
16 return intel_uncore_read(&i915->uncore, reg); in intel_de_read()
22 return intel_uncore_read8(&i915->uncore, reg); in intel_de_read8()
35 intel_uncore_posting_read(&i915->uncore, reg); in intel_de_posting_read()
41 intel_uncore_write(&i915->uncore, reg, val); in intel_de_write()
47 return intel_uncore_rmw(&i915->uncore, reg, clear, set); in intel_de_rmw()
101 val = intel_uncore_read_fw(&i915->uncore, reg); in intel_de_read_fw()
110 trace_i915_reg_rw(true, reg, val, sizeof(val), true); in intel_de_write_fw()
111 intel_uncore_write_fw(&i915->uncore, reg, val); in intel_de_write_fw()
117 return intel_uncore_read_notrace(&i915->uncore, reg); in intel_de_read_notrace()
[all …]
/openbsd/gnu/usr.bin/binutils/gas/
H A Dm68k-parse.c1080 op->reg = yyvsp[0].reg; in yyparse()
1087 op->reg = yyvsp[0].reg; in yyparse()
1094 op->reg = yyvsp[0].reg; in yyparse()
1101 op->reg = yyvsp[0].reg; in yyparse()
1108 op->reg = yyvsp[0].reg; in yyparse()
1143 op->reg = yyvsp[-1].reg; in yyparse()
1150 op->reg = yyvsp[-2].reg; in yyparse()
1157 op->reg = yyvsp[-1].reg; in yyparse()
1163 op->reg = yyvsp[-1].reg; in yyparse()
1175 op->reg = yyvsp[-3].reg; in yyparse()
[all …]
/openbsd/sys/arch/powerpc/include/
H A Dasm.h81 66: mflr reg; \
82 addis reg, reg, (__retguard_ ## x - 66b)@ha; \
83 lwz reg, ((__retguard_ ## x - 66b)@l)(reg)
87 lwz reg, ((__retguard_ ## x)@l)(reg)
95 xor reg, reg, retreg
97 xor reg, reg, retreg; \
100 twne reg, %r10
102 stw reg, loc
104 lwz reg, loc
122 # define RETGUARD_SAVE(reg, loc) argument
[all …]
/openbsd/gnu/usr.bin/binutils/gdb/
H A Duser-regs.c68 reg->name = name; in append_user_reg()
69 reg->read = read; in append_user_reg()
70 reg->next = NULL; in append_user_reg()
71 (*regs->last) = reg; in append_user_reg()
94 struct user_reg *reg; in user_regs_init() local
97 for (reg = builtin_user_regs.first; reg != NULL; reg = reg->next) in user_regs_init()
98 append_user_reg (regs, reg->name, reg->read, in user_regs_init()
149 for (nr = 0, reg = regs->first; reg != NULL; reg = reg->next, nr++) in user_reg_map_name_to_regnum()
166 for (reg = regs->first; reg != NULL; reg = reg->next) in usernum_to_user_reg()
169 return reg; in usernum_to_user_reg()
[all …]
/openbsd/gnu/usr.bin/binutils/gdb/gdbserver/
H A DMakefile.in201 rm -f reg-arm.c reg-i386.c reg-ia64.c reg-m68k.c reg-mips.c
202 rm -f reg-ppc.c reg-sh.c reg-x86-64.c reg-i386-linux.c
272 reg-arm.o : reg-arm.c $(regdef_h)
275 reg-i386.o : reg-i386.c $(regdef_h)
281 reg-ia64.o : reg-ia64.c $(regdef_h)
284 reg-m68k.o : reg-m68k.c $(regdef_h)
287 reg-mips.o : reg-mips.c $(regdef_h)
290 reg-ppc.o : reg-ppc.c $(regdef_h)
293 reg-s390.o : reg-s390.c $(regdef_h)
296 reg-s390x.o : reg-s390x.c $(regdef_h)
[all …]
/openbsd/sys/dev/pci/
H A Dif_vgevar.h106 #define CSR_READ_4(sc, reg) \ argument
108 #define CSR_READ_2(sc, reg) \ argument
110 #define CSR_READ_1(sc, reg) \ argument
113 #define CSR_SETBIT_1(sc, reg, x) \ argument
114 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x))
115 #define CSR_SETBIT_2(sc, reg, x) \ argument
116 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))
118 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
121 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x))
123 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
[all …]
/openbsd/usr.sbin/pcidump/
H A Dpcidump.c810 PCI_INTERRUPT_LINE(reg), PCI_MIN_GNT(reg), PCI_MAX_LAT(reg)); in dump_type0()
825 (reg >> 16) & 0xff, (reg >> 24) & 0xff); in dump_type1()
831 (reg >> 8) & 0xff, (reg >> 16) & 0xffff); in dump_type1()
842 (reg >> 0) & 0xffff, (reg >> 16) & 0xffff); in dump_type1()
877 PCI_INTERRUPT_LINE(reg), reg >> 16); in dump_type1()
895 (reg >> 16) & 0xff, (reg >> 24) & 0xff); in dump_type2()
934 PCI_INTERRUPT_LINE(reg), reg >> 16); in dump_type2()
958 PCI_VENDOR(reg), PCI_PRODUCT(reg)); in dump()
974 PCI_INTERFACE(reg), PCI_REVISION(reg)); in dump()
980 PCI_BIST(reg), PCI_HDRTYPE(reg), in dump()
[all …]

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