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Searched refs:tg (Results 1 – 25 of 87) sorted by relevance

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/openbsd/sys/dev/pci/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.h117 #define DCE110TG_FROM_TG(tg)\ argument
128 struct timing_generator *tg,
136 struct timing_generator *tg,
154 struct timing_generator *tg,
170 struct timing_generator *tg,
179 struct timing_generator *tg,
185 struct timing_generator *tg,
202 struct timing_generator *tg,
208 struct timing_generator *tg,
212 struct timing_generator *tg,
[all …]
H A Ddce110_timing_generator.c66 struct timing_generator *tg, in dce110_timing_generator_apply_front_porch_workaround() argument
146 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true); in dce110_timing_generator_enable_crtc()
217 tg->funcs->wait_for_vblank(tg);
218 tg->funcs->wait_for_vactive(tg);
238 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false); in dce110_timing_generator_disable_crtc()
271 dm_write_reg(tg->ctx, in program_horz_count_by_2()
342 result = tg->bp->funcs->program_crtc_timing(tg->bp, &bp_params); in dce110_timing_generator_program_timing_generator()
590 tg, &position); in dce110_timing_generator_get_crtc_scanoutpos()
1399 tg->funcs->get_position(tg, &position1); in dce110_timing_generator_is_counter_moving()
1400 tg->funcs->get_position(tg, &position2); in dce110_timing_generator_is_counter_moving()
[all …]
H A Ddce110_timing_generator_v.c42 tg->ctx->logger
64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
140 struct timing_generator *tg) in dce110_timing_generator_v_is_in_vertical_blank() argument
242 struct timing_generator *tg, in dce110_timing_generator_v_program_blanking() argument
384 struct timing_generator *tg, in dce110_timing_generator_v_enable_advanced_request() argument
477 struct timing_generator *tg, in dce110_timing_generator_v_set_overscan_color_black() argument
613 struct timing_generator *tg) in dce110_timing_generator_v_did_triggered_reset_occur() argument
[all …]
H A Ddce110_hw_sequencer.c673 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream() local
691 tg->funcs->set_early_control(tg, early_control); in dce110_enable_stream()
1153 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_disable_stream() local
1435 pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true); in dce110_enable_stream_timing()
1676 tg->funcs->disable_vga(tg); in disable_vga_and_power_gate_all_controllers()
2474 if (!tg->funcs->is_counter_moving(tg)) { in wait_for_reset_trigger_to_occur()
2479 if (tg->funcs->did_triggered_reset_occur(tg)) { in wait_for_reset_trigger_to_occur()
2488 tg->funcs->wait_for_state(tg, CRTC_STATE_VACTIVE); in wait_for_reset_trigger_to_occur()
2489 tg->funcs->wait_for_state(tg, CRTC_STATE_VBLANK); in wait_for_reset_trigger_to_occur()
2625 tg->funcs->disable_vga(tg); in init_hw()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/inc/hw/
H A Dtiming_generator.h183 bool (*enable_crtc)(struct timing_generator *tg);
196 struct timing_generator *tg,
210 void (*set_blank)(struct timing_generator *tg,
212 bool (*is_blanked)(struct timing_generator *tg);
215 void (*set_colors)(struct timing_generator *tg,
223 void (*unlock)(struct timing_generator *tg);
224 void (*lock)(struct timing_generator *tg);
245 struct timing_generator *tg,
263 void (*tg_init)(struct timing_generator *tg);
287 bool (*get_crc)(struct timing_generator *tg,
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank()
114 tg, in dce120_timing_generator_validate_timing()
174 tg->ctx, in dce120_timing_generator_get_vblank_counter()
190 tg->ctx, in dce120_timing_generator_get_crtc_position()
217 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank()
224 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank()
235 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vactive()
375 tg->ctx, in dce120_timing_generator_did_triggered_reset_occur()
529 tg->ctx, in dce120_timing_generator_set_overscan_color_black()
676 tg->ctx, in dce120_tg_program_blank_color()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dce60/
H A Ddce60_timing_generator.c91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
124 struct timing_generator *tg, in dce60_timing_generator_enable_advanced_request() argument
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request()
133 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request()
174 dm_write_reg(tg->ctx, addr, value); in dce60_timing_generator_enable_advanced_request()
175 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request()
186 value = dm_read_reg(tg->ctx, addr); in dce60_is_tg_enabled()
[all …]
H A Ddce60_hw_sequencer.c128 params.inst = pipe_ctx->stream_res.tg->inst; in dce60_enable_fbc()
192 pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, blank_target); in dce60_program_surface_visibility()
200 uint32_t color_value = MAX_TG_COLOR_VALUE * (4 - pipe_ctx->stream_res.tg->inst) / 4; in dce60_get_surface_visual_confirm_color()
251 if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color) { in dce60_program_scaler()
260 pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color( in dce60_program_scaler()
261 pipe_ctx->stream_res.tg, in dce60_program_scaler()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
114 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes()
1338 tg->funcs->lock(tg); in dcn10_init_pipes()
1340 tg->funcs->lock(tg); in dcn10_init_pipes()
1341 tg->funcs->set_blank(tg, true); in dcn10_init_pipes()
1392 tg->funcs->tg_init(tg); in dcn10_init_pipes()
1402 pipe_ctx->stream_res.tg = tg; in dcn10_init_pipes()
1420 tg->funcs->unlock(tg); in dcn10_init_pipes()
1429 tg->funcs->init_odm(tg); in dcn10_init_pipes()
1432 tg->funcs->tg_init(tg); in dcn10_init_pipes()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn201/
H A Ddcn201_hwseq.c177 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
182 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
272 if (tg->funcs->is_tg_enabled(tg)) { in dcn201_init_hw()
280 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
281 tg->funcs->lock(tg); in dcn201_init_hw()
307 pipe_ctx->stream_res.tg = tg; in dcn201_init_hw()
333 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
334 tg->funcs->unlock(tg); in dcn201_init_hw()
349 tg->funcs->tg_init(tg); in dcn201_init_hw()
543 pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg); in dcn201_pipe_control_lock()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); in program_timing()
124 struct timing_generator *tg, in dce80_timing_generator_enable_advanced_request() argument
128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce80_timing_generator_enable_advanced_request()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c303 tg->funcs->get_otg_active_size(tg, in dcn20_init_blank()
636 if (tg && tg->funcs->disable_phantom_crtc) in dcn20_disable_plane()
637 tg->funcs->disable_phantom_crtc(tg); in dcn20_disable_plane()
1868 tg->funcs->enable_crtc(tg); in dcn20_program_front_end_for_ctx()
2854 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
2861 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
2862 tg->funcs->lock(tg); in dcn20_fpga_init_hw()
2888 pipe_ctx->stream_res.tg = tg; in dcn20_fpga_init_hw()
2916 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
2917 tg->funcs->unlock(tg); in dcn20_fpga_init_hw()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dce/
H A Ddce_hwseq.c56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
/openbsd/gnu/llvm/clang/utils/
H A DFuzzTest72 def __init__(self, tg, test): argument
73 self.tg = tg
81 name,data = self.tg.inputs[i]
95 name,data = self.tg.inputs[i]
114 file_data = test_application.tg.inputs[test[3][0]][1]
319 tg = TestGenerator(input_files, opts.enable_delete, opts.enable_insert,
322 print '%s: note: %d input bytes.' % (sys.argv[0], tg.num_positions)
323 print '%s: note: %d total tests.' % (sys.argv[0], tg.num_tests)
328 itertools.repeat(tg.num_tests, opts.max_tests))
332 t = tg.get_test(test)
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c485 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
487 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
548 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
887 inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst; in dp_set_test_pattern()
895 pipe_ctx->stream_res.tg); in dp_set_test_pattern()
898 pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
917 pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
918 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
920 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
922 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_hwseq.c197 if (tg) { in dcn31_init_hw()
198 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn31_init_hw()
199 tg->funcs->get_optc_source(tg, &num_opps, in dcn31_init_hw()
518 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in dcn31_reset_back_end_for_pipe()
519 pipe_ctx->stream_res.tg, in dcn31_reset_back_end_for_pipe()
521 pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); in dcn31_reset_back_end_for_pipe()
522 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); in dcn31_reset_back_end_for_pipe()
524 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn31_reset_back_end_for_pipe()
529 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe()
530 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn21/
H A Ddcn21_hwseq.c182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable()
209 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_pipe() local
214 if (!abm && !tg && !panel_cntl) in dcn21_set_pipe()
217 otg_inst = tg->inst; in dcn21_set_pipe()
244 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_backlight_level() local
248 if (!abm && !tg && !panel_cntl) in dcn21_set_backlight_level()
251 otg_inst = tg->inst; in dcn21_set_backlight_level()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c136 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
137 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
143 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
144 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
194 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm()
195 pipe_ctx->stream_res.tg, in dcn314_update_odm()
199 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
200 pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); in dcn314_update_odm()
406 pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()
418 pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c402 pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK); in dcn32_subvp_pipe_control_lock()
1045 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
1052 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
1105 pipe_ctx->stream_res.tg, in dcn32_update_odm()
1215 pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); in dcn32_resync_fifo_dccg_dio()
1227 pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); in dcn32_resync_fifo_dccg_dio()
1518 tg->funcs->get_otg_active_size(tg, in dcn32_init_blank()
1523 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn32_init_blank()
1603 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn32_blank_phantom()
1624 if (tg->funcs->is_tg_enabled(tg)) in dcn32_blank_phantom()
[all …]
H A Ddcn32_hwseq.h116 struct timing_generator *tg);
119 struct timing_generator *tg,
/openbsd/sys/dev/pci/drm/amd/display/dc/irq/dce110/
H A Dirq_service_dce110.c214 struct timing_generator *tg; in dce110_vblank_set() local
219 tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; in dce110_vblank_set()
222 if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) { in dce110_vblank_set()
/openbsd/sys/dev/pci/drm/
H A Ddrm_connector.c3107 kfree(tg); in drm_tile_group_free()
3144 tg = NULL; in drm_mode_get_tile_group()
3146 return tg; in drm_mode_get_tile_group()
3171 tg = kzalloc(sizeof(*tg), GFP_KERNEL); in drm_mode_create_tile_group()
3172 if (!tg) in drm_mode_create_tile_group()
3175 kref_init(&tg->refcount); in drm_mode_create_tile_group()
3177 tg->dev = dev; in drm_mode_create_tile_group()
3182 tg->id = ret; in drm_mode_create_tile_group()
3184 kfree(tg); in drm_mode_create_tile_group()
3185 tg = NULL; in drm_mode_create_tile_group()
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/core/
H A Damdgpu_dc.c629 tg = pipe->stream_res.tg; in dc_stream_configure_crc()
633 return tg->funcs->configure_crc(tg, &param); in dc_stream_configure_crc()
668 tg = pipe->stream_res.tg; in dc_stream_get_crc()
670 if (tg->funcs->get_crc) in dc_stream_get_crc()
671 return tg->funcs->get_crc(tg, r_cr, g_y, b_cb); in dc_stream_get_crc()
1150 tg = pipe->stream_res.tg; in disable_dangling_plane()
1165 tg->funcs->enable_crtc(tg); in disable_dangling_plane()
1193 tg->funcs->disable_phantom_crtc(tg); in disable_dangling_plane()
1628 if (!tg->funcs->get_hw_timing(tg, &hw_crtc_timing)) in dc_validate_boot_timing()
1681 tg->funcs->get_optc_source(tg, in dc_validate_boot_timing()
[all …]
H A Ddc_stream.c583 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; in dc_stream_get_vblank_counter() local
585 if (res_ctx->pipe_ctx[i].stream != stream || !tg) in dc_stream_get_vblank_counter()
588 return tg->funcs->get_frame_count(tg); in dc_stream_get_vblank_counter()
642 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; in dc_stream_get_scanoutpos() local
644 if (res_ctx->pipe_ctx[i].stream != stream || !tg) in dc_stream_get_scanoutpos()
647 tg->funcs->get_scanoutpos(tg, in dc_stream_get_scanoutpos()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.c634 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE); in dcn30_set_avmute()
635 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK); in dcn30_set_avmute()
636 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE); in dcn30_set_avmute()
637 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK); in dcn30_set_avmute()
638 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE); in dcn30_set_avmute()
1022 pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(pipe_ctx[i]->stream_res.tg, in dcn30_set_static_screen_control()

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