/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VEInstrIntrinsicVL.gen.td | 165 def : Pat<(int_ve_vl_lvm_mmss v256i1:$ptm, uimm6:$N, i64:$sz), (LVMir_m (ULO7 $N), i64:$sz, v256i1:… 167 def : Pat<(int_ve_vl_svm_sms v256i1:$vmz, uimm6:$N), (SVMmi v256i1:$vmz, (ULO7 $N))>; 1626 def : Pat<(int_ve_vl_andm_mmm v256i1:$vmy, v256i1:$vmz), (ANDMmm v256i1:$vmy, v256i1:$vmz)>; 1628 def : Pat<(int_ve_vl_orm_mmm v256i1:$vmy, v256i1:$vmz), (ORMmm v256i1:$vmy, v256i1:$vmz)>; 1630 def : Pat<(int_ve_vl_xorm_mmm v256i1:$vmy, v256i1:$vmz), (XORMmm v256i1:$vmy, v256i1:$vmz)>; 1632 def : Pat<(int_ve_vl_eqvm_mmm v256i1:$vmy, v256i1:$vmz), (EQVMmm v256i1:$vmy, v256i1:$vmz)>; 1634 def : Pat<(int_ve_vl_nndm_mmm v256i1:$vmy, v256i1:$vmz), (NNDMmm v256i1:$vmy, v256i1:$vmz)>; 1636 def : Pat<(int_ve_vl_negm_mm v256i1:$vmy), (NEGMm v256i1:$vmy)>; 1638 def : Pat<(int_ve_vl_pcvm_sml v256i1:$vmy, i32:$vl), (PCVMml v256i1:$vmy, i32:$vl)>; 1639 def : Pat<(int_ve_vl_lzvm_sml v256i1:$vmy, i32:$vl), (LZVMml v256i1:$vmy, i32:$vl)>; [all …]
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H A D | VVPInstrPatternsVec.td | 49 defm : VectorStore<v256f64, i64, v256i1, "VST", "VST">; 50 defm : VectorStore<v256i64, i64, v256i1, "VST", "VST">; 110 defm : VectorGather<v256f64, v256i64, v256i1, "VGT">; 111 defm : VectorGather<v256i64, v256i64, v256i1, "VGT">; 112 defm : VectorGather<v256f32, v256i64, v256i1, "VGTU">; 128 defm : VectorScatter<v256f64, v256i64, v256i1, "VSC">; 146 v256i1:$mask, 556 LongDataVT, v256i1, 559 ShortDataVT, v256i1, 572 def : Pat<(v256i1 (vvp_setcc [all …]
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H A D | VEInstrIntrinsicVL.td | 18 def : Pat<(v256i1 (int_ve_vl_extract_vm512u v512i1:$vm)), 21 def : Pat<(v256i1 (int_ve_vl_extract_vm512l v512i1:$vm)), 24 def : Pat<(v512i1 (int_ve_vl_insert_vm512u v512i1:$vmx, v256i1:$vmy)), 25 (INSERT_SUBREG v512i1:$vmx, v256i1:$vmy, sub_vm_even)>; 27 def : Pat<(v512i1 (int_ve_vl_insert_vm512l v512i1:$vmx, v256i1:$vmy)), 28 (INSERT_SUBREG v512i1:$vmx, v256i1:$vmy, sub_vm_odd)>; 43 def : Pat<(int_ve_vl_vmv_vsvmvl i32:$sy, v256f64:$vz, v256i1:$vm, v256f64:$pt, 45 (VMVrvml_v (i2l i32:$sy), v256f64:$vz, v256i1:$vm, i32:$vl,
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H A D | VEInstrPatternsVec.td | 30 // Store for v256i1, v512i1 are implemented in 2 ways. These STVM/STVM512 34 def : Pat<(v256i1 (load ADDRrii:$addr)), 38 def : Pat<(store v256i1:$vx, ADDRrii:$addr), 126 def: Mask_Binary<v256i1, and, "ANDM">; 127 def: Mask_Binary<v256i1, or, "ORM">; 128 def: Mask_Binary<v256i1, xor, "XORM">; 132 // v256i1 <> v512i1 133 def : Pat<(v256i1 (vec_unpack_lo v512i1:$vm, (i32 srcvalue))), 135 def : Pat<(v256i1 (vec_unpack_hi v512i1:$vm, (i32 srcvalue))), 137 def : Pat<(v512i1 (vec_pack v256i1:$vlo, v256i1:$vhi, (i32 srcvalue))),
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H A D | VVPISelLowering.cpp | 28 SDValue LoA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Lo, AVL); in splitMaskArithmetic() 29 SDValue HiA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Hi, AVL); in splitMaskArithmetic() 30 SDValue LoB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Lo, AVL); in splitMaskArithmetic() 31 SDValue HiB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Hi, AVL); in splitMaskArithmetic() 33 auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB}); in splitMaskArithmetic() 34 auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB}); in splitMaskArithmetic()
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H A D | VECallingConv.td | 113 CCIfType<[v256i1], 134 CCIfType<[v256i1],
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H A D | VEISelDAGToDAG.cpp | 282 MVT::v256i1); in Select()
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H A D | VERegisterInfo.td | 198 def VM : RegisterClass<"VE", [v256i1], 64, (sequence "VM%u", 0, 15)>;
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H A D | VECustomDAG.cpp | 516 NewMask = getUnpack(MVT::v256i1, RawMask, Part, NewAVL); in getTargetSplitMask()
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H A D | VEISelLowering.cpp | 79 static const MVT AllMaskVTs[] = {MVT::v256i1, MVT::v512i1}; 94 addRegisterClass(MVT::v256i1, &VE::VMRegClass); in initRegisterClasses() 1381 if (MemVT == MVT::v256i1 || MemVT == MVT::v4i64) { in lowerLoadI1() 1506 if (MemVT == MVT::v256i1 || MemVT == MVT::v4i64) { in lowerStoreI1()
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/openbsd/gnu/llvm/llvm/include/llvm/IR/ |
H A D | IntrinsicsVEVL.gen.td | 87 … ClangBuiltin<"__builtin_ve_vl_lvm_mmss">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256i1>, LLVMTy… 844 …<"__builtin_ve_vl_vfmklgt_mvml">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256f64>, LLVMType<v256i… 846 …<"__builtin_ve_vl_vfmkllt_mvml">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256f64>, LLVMType<v256i… 848 …<"__builtin_ve_vl_vfmklne_mvml">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256f64>, LLVMType<v256i… 850 …<"__builtin_ve_vl_vfmkleq_mvml">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256f64>, LLVMType<v256i… 1235 …ltin<"__builtin_ve_vl_andm_mmm">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256i1>, LLVMType<v256i1… 1237 …iltin<"__builtin_ve_vl_orm_mmm">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256i1>, LLVMType<v256i1… 1239 …ltin<"__builtin_ve_vl_xorm_mmm">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256i1>, LLVMType<v256i1… 1241 …ltin<"__builtin_ve_vl_eqvm_mmm">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256i1>, LLVMType<v256i1… 1243 …ltin<"__builtin_ve_vl_nndm_mmm">, Intrinsic<[LLVMType<v256i1>], [LLVMType<v256i1>, LLVMType<v256i1… [all …]
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H A D | IntrinsicsVE.td | 14 Intrinsic<[LLVMType<v256i1>], [LLVMType<v512i1>], [IntrNoMem]>; 18 Intrinsic<[LLVMType<v256i1>], [LLVMType<v512i1>], [IntrNoMem]>; 22 Intrinsic<[LLVMType<v512i1>], [LLVMType<v512i1>, LLVMType<v256i1>], 27 Intrinsic<[LLVMType<v512i1>], [LLVMType<v512i1>, LLVMType<v256i1>],
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H A D | Intrinsics.td | 281 def llvm_v256i1_ty : LLVMType<v256i1>; // 256 x i1
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrMMA.td | 715 def : Pat<(v512i1 (int_ppc_mma_xvf64ger v256i1:$XA, v16i8:$XB)), 717 def : Pat<(v512i1 (int_ppc_mma_xvf64gerpp v512i1:$ATi, v256i1:$XA, v16i8:$XB)), 719 def : Pat<(v512i1 (int_ppc_mma_xvf64gerpn v512i1:$ATi, v256i1:$XA, v16i8:$XB)), 721 def : Pat<(v512i1 (int_ppc_mma_xvf64gernp v512i1:$ATi, v256i1:$XA, v16i8:$XB)), 723 def : Pat<(v512i1 (int_ppc_mma_xvf64gernn v512i1:$ATi, v256i1:$XA, v16i8:$XB)), 755 def : Pat<(v512i1 (int_ppc_mma_xvf64ger v256i1:$XA, v16i8:$XB)), 757 def : Pat<(v512i1 (int_ppc_mma_xvf64gerpp v512i1:$ATi, v256i1:$XA, v16i8:$XB)), 1059 (v256i1 (INSERT_SUBREG 1063 (v256i1 (INSERT_SUBREG 1074 dag Pair0 = (v256i1 (EXTRACT_SUBREG $v, sub_pair0)); [all …]
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H A D | PPCRegisterInfoMMA.td | 93 RegisterClass<"PPC", [v256i1], 128,
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H A D | PPCInstrP10.td | 70 SDTCisVT<0, v256i1>, SDTCisVT<1, v4i32>, SDTCisVT<2, v4i32> 76 SDTCisVT<0, v4i32>, SDTCisVT<1, v256i1>, SDTCisPtrTy<2> 1033 (v256i1 (INSERT_SUBREG 1037 (v256i1 (INSERT_SUBREG 1043 def : Pat<(v256i1 (PPCPairBuild v4i32:$vs1, v4i32:$vs0)), 1045 def : Pat<(v256i1 (int_ppc_vsx_assemble_pair v16i8:$vs1, v16i8:$vs0)), 1087 def : Pat<(v256i1 (int_ppc_vsx_lxvp DQForm:$src)), (LXVP memrix16:$src)>; 1088 def : Pat<(v256i1 (int_ppc_vsx_lxvp XForm:$src)), (LXVPX XForm:$src)>; 1093 def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, DQForm:$dst), 1095 def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, XForm:$dst), [all …]
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H A D | PPCRegisterInfoDMR.td | 141 def DMRROWpRC : RegisterClass<"PPC", [v256i1], 128,
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H A D | PPCISelLowering.cpp | 1310 addRegisterClass(MVT::v256i1, &PPC::VSRpRCRegClass); in PPCTargetLowering() 1311 setOperationAction(ISD::LOAD, MVT::v256i1, Custom); in PPCTargetLowering() 1312 setOperationAction(ISD::STORE, MVT::v256i1, Custom); in PPCTargetLowering() 10601 EVT ReturnTypes[] = {MVT::v256i1, MVT::v256i1}; in LowerINTRINSIC_WO_CHAIN() 11048 if (VT != MVT::v256i1 && VT != MVT::v512i1) in LowerVectorLoad() 11056 assert((VT != MVT::v256i1 || Subtarget.pairedVectorMemops()) && in LowerVectorLoad() 11095 if (StoreVT != MVT::v256i1 && StoreVT != MVT::v512i1) in LowerVectorStore() 11103 assert((StoreVT != MVT::v256i1 || Subtarget.pairedVectorMemops()) && in LowerVectorStore() 11110 EVT ReturnTypes[] = {MVT::v256i1, MVT::v256i1}; in LowerVectorStore()
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/openbsd/gnu/llvm/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 74 v256i1 = 25, // 256 x i1 enumerator 441 SimpleTy == MVT::v256i1 || SimpleTy == MVT::v128i2 || in is256BitVector() 555 case v256i1: in getVectorElementType() 740 case v256i1: in getVectorMinNumElements() 1036 case v256i1: in getSizeInBits() 1277 if (NumElements == 256) return MVT::v256i1; in getVectorVT()
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | ValueTypes.td | 47 def v256i1 : ValueType<256, 25>; // 256 x i1 vector value
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/openbsd/gnu/llvm/llvm/utils/TableGen/ |
H A D | CodeGenTarget.cpp | 91 case MVT::v256i1: return "MVT::v256i1"; in getEnumName()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/ |
H A D | ValueTypes.cpp | 229 case MVT::v256i1: in getTypeForEVT()
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