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Searched refs:wb_gpu_addr (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dmes_v10_1.c632 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v10_1_mqd_init() local
677 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v10_1_mqd_init()
678 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v10_1_mqd_init()
680 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v10_1_mqd_init()
683 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v10_1_mqd_init()
684 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v10_1_mqd_init()
685 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v10_1_mqd_init()
H A Dmes_v11_0.c712 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v11_0_mqd_init() local
757 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v11_0_mqd_init()
758 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v11_0_mqd_init()
760 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
763 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
764 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v11_0_mqd_init()
765 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
H A Dsdma_v6_0.c821 uint64_t wb_gpu_addr; in sdma_v6_0_mqd_init() local
832 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
833 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
834 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
836 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v6_0_mqd_init()
837 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
838 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
H A Dsdma_v5_2.c786 uint64_t wb_gpu_addr; in sdma_v5_2_mqd_init() local
800 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
801 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
802 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
804 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_2_mqd_init()
805 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
806 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
H A Dsdma_v5_0.c938 uint64_t wb_gpu_addr; in sdma_v5_0_mqd_init() local
952 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
953 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
954 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
956 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_0_mqd_init()
957 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
958 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
H A Dgfx_v11_0.c3599 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v11_0_gfx_mqd_init() local
3640 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
3641 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
3643 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
3646 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
3647 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
3743 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v11_0_compute_mqd_init() local
3817 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
3820 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_compute_mqd_init()
3823 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
[all …]
H A Dgfx_v7_0.c2858 u64 wb_gpu_addr; in gfx_v7_0_mqd_init() local
2913 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()
2914 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2915 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
2918 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v7_0_mqd_init()
2919 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2921 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
H A Dgfx_v9_4_3.c1474 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_4_3_xcc_mqd_init() local
1559 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v9_4_3_xcc_mqd_init()
1560 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init()
1562 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_4_3_xcc_mqd_init()
1565 wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v9_4_3_xcc_mqd_init()
1566 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init()
1567 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_4_3_xcc_mqd_init()
H A Dgfx_v9_4_2.c351 u32 compute_dim_x, u64 wb_gpu_addr, u32 pattern, in gfx_v9_4_2_run_shader() argument
399 ib->ptr[ib->length_dw++] = lower_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
400 ib->ptr[ib->length_dw++] = upper_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
H A Dgfx_v10_0.c6353 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v10_0_gfx_mqd_init() local
6391 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6392 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6394 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_gfx_mqd_init()
6397 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6398 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6503 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v10_0_compute_mqd_init() local
6580 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
6583 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_compute_mqd_init()
6586 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
[all …]
H A Dgfx_v8_0.c4415 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v8_0_mqd_init() local
4478 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v8_0_mqd_init()
4479 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()
4481 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_mqd_init()
4484 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
4485 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()
4486 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c3252 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_0_mqd_init() local
3341 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v9_0_mqd_init()
3342 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3344 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
3347 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
3348 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3349 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
/openbsd/sys/dev/pci/drm/radeon/
H A Dcik.c4516 u64 wb_gpu_addr; in cik_cp_compute_resume() local
4677 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP1_WPTR_OFFSET; in cik_cp_compute_resume()
4679 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP2_WPTR_OFFSET; in cik_cp_compute_resume()
4680 mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4681 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()
4688 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET; in cik_cp_compute_resume()
4690 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET; in cik_cp_compute_resume()
4691 mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4693 upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()