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Searched refs:ARMV7M_EXCP_BUS (Results 1 – 3 of 3) sorted by relevance

/qemu/hw/intc/
H A Darmv7m_nvic.c187 case ARMV7M_EXCP_BUS: in exc_targets_secure()
714 case ARMV7M_EXCP_BUS: in armv7m_nvic_set_pending_lazyfp()
1215 if (s->vectors[ARMV7M_EXCP_BUS].active) { in nvic_readl()
1218 if (s->vectors[ARMV7M_EXCP_BUS].pending) { in nvic_readl()
1221 if (s->vectors[ARMV7M_EXCP_BUS].enabled) { in nvic_readl()
1729 s->sec_vectors[ARMV7M_EXCP_BUS].enabled = (value & (1 << 17)) != 0; in nvic_writel()
1754 s->vectors[ARMV7M_EXCP_BUS].active = (value & (1 << 1)) != 0; in nvic_writel()
1755 s->vectors[ARMV7M_EXCP_BUS].pending = (value & (1 << 14)) != 0; in nvic_writel()
1756 s->vectors[ARMV7M_EXCP_BUS].enabled = (value & (1 << 17)) != 0; in nvic_writel()
2184 case ARMV7M_EXCP_BUS: in shpr_bank()
/qemu/target/arm/tcg/
H A Dm_helper.c269 exc = ARMV7M_EXCP_BUS; in v7m_stack_write()
339 exc = ARMV7M_EXCP_BUS; in v7m_stack_read()
1024 bfrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_BUS, false); in v7m_update_fpccr()
2023 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_BUS, false); in v7m_read_half_insn()
2075 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_BUS, false); in v7m_read_sg_stack_word()
2313 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_BUS, false); in arm_v7m_cpu_do_interrupt()
/qemu/target/arm/
H A Dcpu.h71 #define ARMV7M_EXCP_BUS 5 macro