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Searched refs:DEFINE_PROP_UINT8 (Results 1 – 25 of 85) sorted by relevance

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/qemu/hw/adc/
H A Dmax111x.c160 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
161 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
162 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
163 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
169 DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
170 DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
171 DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
172 DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
173 DEFINE_PROP_UINT8("input4", MAX111xState, reset_input[4], 0xb0),
174 DEFINE_PROP_UINT8("input5", MAX111xState, reset_input[5], 0xa0),
[all …]
/qemu/hw/sd/
H A Dsdhci-internal.h311 DEFINE_PROP_UINT8("endianness", _state, endianness, DEVICE_LITTLE_ENDIAN), \
312 DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
313 DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
314 DEFINE_PROP_UINT8("vendor", _state, vendor, SDHCI_VENDOR_NONE), \
/qemu/target/microblaze/
H A Dcpu.c344 DEFINE_PROP_UINT8("addr-size", MicroBlazeCPU, cfg.addr_size, 32),
349 DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
353 DEFINE_PROP_UINT8("use-hw-mul", MicroBlazeCPU, cfg.use_hw_mul, 2),
368 DEFINE_PROP_UINT8("use-non-secure", MicroBlazeCPU, cfg.use_non_secure, 0),
387 DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
388 DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
/qemu/hw/misc/
H A Dmsf2-sysreg.c123 DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
124 DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),
H A Dpvpanic-pci.c57 DEFINE_PROP_UINT8("events", PVPanicPCIState, pvpanic.events,
H A Dpvpanic-isa.c104 DEFINE_PROP_UINT8("events", PVPanicISAState, pvpanic.events,
/qemu/migration/
H A Doptions.c90 DEFINE_PROP_UINT8("x-clear-bitmap-shift", MigrationState,
96 DEFINE_PROP_UINT8("x-throttle-trigger-threshold", MigrationState,
99 DEFINE_PROP_UINT8("x-cpu-throttle-initial", MigrationState,
102 DEFINE_PROP_UINT8("x-cpu-throttle-increment", MigrationState,
117 DEFINE_PROP_UINT8("multifd-channels", MigrationState,
123 DEFINE_PROP_UINT8("multifd-zlib-level", MigrationState,
126 DEFINE_PROP_UINT8("multifd-zstd-level", MigrationState,
135 DEFINE_PROP_UINT8("max-cpu-throttle", MigrationState,
/qemu/hw/pci/
H A Dpcie_port.c125 DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
218 DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
/qemu/hw/dma/
H A Dpl330.c1652 DEFINE_PROP_UINT8("num_periph_req", PL330State, num_periph_req, 4),
1653 DEFINE_PROP_UINT8("num_events", PL330State, num_events, 16),
1654 DEFINE_PROP_UINT8("mgr_ns_at_rst", PL330State, mgr_ns_at_rst, 0),
1656 DEFINE_PROP_UINT8("i-cache_len", PL330State, i_cache_len, 4),
1657 DEFINE_PROP_UINT8("num_i-cache_lines", PL330State, num_i_cache_lines, 8),
1663 DEFINE_PROP_UINT8("data_width", PL330State, data_width, 64),
1664 DEFINE_PROP_UINT8("wr_cap", PL330State, wr_cap, 8),
1665 DEFINE_PROP_UINT8("wr_q_dep", PL330State, wr_q_dep, 16),
1666 DEFINE_PROP_UINT8("rd_cap", PL330State, rd_cap, 8),
1667 DEFINE_PROP_UINT8("rd_q_dep", PL330State, rd_q_dep, 16),
/qemu/hw/char/
H A Dserial-pci-multi.c138 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
147 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
H A Dserial-pci.c85 DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
/qemu/hw/arm/
H A Dmsf2-soc.c235 DEFINE_PROP_UINT8("apb0div", MSF2State, apb0div, 2),
236 DEFINE_PROP_UINT8("apb1div", MSF2State, apb1div, 2),
/qemu/hw/ppc/
H A Dprep_systemio.c289 DEFINE_PROP_UINT8("ibm-planar-id", PrepSystemIoState, ibm_planar_id, 0),
290 DEFINE_PROP_UINT8("equipment", PrepSystemIoState, equipment, 0),
H A Dppc4xx_devs.c235 DEFINE_PROP_UINT8("txc-num", Ppc4xxMalState, txcnum, 0),
236 DEFINE_PROP_UINT8("rxc-num", Ppc4xxMalState, rxcnum, 0),
/qemu/hw/nvme/
H A Dns.c804 DEFINE_PROP_UINT8("mset", NvmeNamespace, params.mset, 0),
805 DEFINE_PROP_UINT8("pi", NvmeNamespace, params.pi, 0),
806 DEFINE_PROP_UINT8("pil", NvmeNamespace, params.pil, 0),
807 DEFINE_PROP_UINT8("pif", NvmeNamespace, params.pif, 0),
810 DEFINE_PROP_UINT8("msrc", NvmeNamespace, params.msrc, 127),
/qemu/hw/ipmi/
H A Dipmi.c112 DEFINE_PROP_UINT8("slave_addr", IPMIBmc, slave_addr, 0x20),
/qemu/hw/display/
H A Dmacfb.c764 DEFINE_PROP_UINT8("depth", MacfbSysBusState, macfb.depth, 8),
765 DEFINE_PROP_UINT8("display", MacfbSysBusState, macfb.type,
783 DEFINE_PROP_UINT8("depth", MacfbNubusState, macfb.depth, 8),
784 DEFINE_PROP_UINT8("display", MacfbNubusState, macfb.type,
H A Dvga-mmio.c115 DEFINE_PROP_UINT8("it_shift", VGAMmioState, it_shift, 0),
/qemu/hw/i386/xen/
H A Dxen_pvdevice.c121 DEFINE_PROP_UINT8("revision", XenPVDevice, revision, 0x01),
/qemu/hw/acpi/
H A Dpiix4.c607 DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0),
608 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0),
609 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2),
/qemu/hw/rtc/
H A Dm48t59-isa.c83 DEFINE_PROP_UINT8("irq", M48txxISAState, isairq, 8),
/qemu/hw/block/
H A Dpflash_cfi01.c923 DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0),
924 DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0),
925 DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0),
/qemu/hw/intc/
H A Dgoldfish_pic.c185 DEFINE_PROP_UINT8("index", GoldfishPICState, idx, 0),
/qemu/hw/ssi/
H A Dssi.c112 DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0),
/qemu/hw/core/
H A Dgeneric-loader.c185 DEFINE_PROP_UINT8("data-len", GenericLoaderState, data_len, 0),

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