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Searched refs:MMU_PHYS_IDX (Results 1 – 10 of 10) sorted by relevance

/qemu/target/i386/tcg/sysemu/
H A Dsvm_helper.c216 svm_save_seg(env, MMU_PHYS_IDX, in helper_vmrun()
219 svm_save_seg(env, MMU_PHYS_IDX, in helper_vmrun()
222 svm_save_seg(env, MMU_PHYS_IDX, in helper_vmrun()
225 svm_save_seg(env, MMU_PHYS_IDX, in helper_vmrun()
353 svm_load_seg_cache(env, MMU_PHYS_IDX, in helper_vmrun()
355 svm_load_seg_cache(env, MMU_PHYS_IDX, in helper_vmrun()
357 svm_load_seg_cache(env, MMU_PHYS_IDX, in helper_vmrun()
359 svm_load_seg_cache(env, MMU_PHYS_IDX, in helper_vmrun()
361 svm_load_seg(env, MMU_PHYS_IDX, in helper_vmrun()
363 svm_load_seg(env, MMU_PHYS_IDX, in helper_vmrun()
[all...]
H A Dexcp_helper.c541 case MMU_PHYS_IDX: in get_physical_address()
550 in.ptw_idx = MMU_PHYS_IDX; in get_physical_address()
568 in.ptw_idx = use_stage2 ? MMU_NESTED_IDX : MMU_PHYS_IDX; in get_physical_address()
/qemu/target/sparc/
H A Dmmu_helper.c82 if (mmu_idx == MMU_PHYS_IDX) { in get_physical_address()
507 case MMU_PHYS_IDX: in build_sfsr()
556 case MMU_PHYS_IDX: in get_physical_address_data()
653 case MMU_PHYS_IDX: in get_physical_address_code()
743 if (mmu_idx == MMU_PHYS_IDX) { in get_physical_address()
H A Dcpu.c726 return MMU_PHYS_IDX; in sparc_cpu_mmu_index()
735 return MMU_PHYS_IDX; in sparc_cpu_mmu_index()
737 return MMU_PHYS_IDX; in sparc_cpu_mmu_index()
H A Dcpu.h657 #define MMU_PHYS_IDX 5 macro
661 #define MMU_PHYS_IDX 2 macro
H A Dtranslate.c1544 mem_idx = MMU_PHYS_IDX; in resolve_asi()
1560 mem_idx = (dc->mem_idx == MMU_PHYS_IDX) ? MMU_PHYS_IDX : mem_idx; in resolve_asi()
1588 mem_idx = MMU_PHYS_IDX; in resolve_asi()
1597 mem_idx = MMU_PHYS_IDX; in resolve_asi()
/qemu/target/alpha/
H A Dtranslate.c2385 tcg_gen_qemu_ld_i64(va, addr, MMU_PHYS_IDX, MO_LESL | MO_ALIGN); in translate_one()
2389 tcg_gen_qemu_ld_i64(va, addr, MMU_PHYS_IDX, MO_LEUQ | MO_ALIGN); in translate_one()
2393 tcg_gen_qemu_ld_i64(va, addr, MMU_PHYS_IDX, MO_LESL | MO_ALIGN); in translate_one()
2399 tcg_gen_qemu_ld_i64(va, addr, MMU_PHYS_IDX, MO_LEUQ | MO_ALIGN); in translate_one()
2649 tcg_gen_qemu_st_i64(va, tmp, MMU_PHYS_IDX, MO_LESL | MO_ALIGN); in translate_one()
2657 tcg_gen_qemu_st_i64(va, tmp, MMU_PHYS_IDX, MO_LEUQ | MO_ALIGN); in translate_one()
2662 MMU_PHYS_IDX, MO_LESL | MO_ALIGN); in translate_one()
2667 MMU_PHYS_IDX, MO_LEUQ | MO_ALIGN); in translate_one()
H A Dcpu.h196 #define MMU_PHYS_IDX 2 macro
H A Dhelper.c178 if (mmu_idx == MMU_PHYS_IDX) { in get_physical_address()
/qemu/target/i386/
H A Dcpu.h2408 #define MMU_PHYS_IDX 6
2431 assert(mmu_index < MMU_PHYS_IDX);
2360 #define MMU_PHYS_IDX global() macro