/qemu/target/loongarch/ |
H A D | vec.h | 45 #define DO_DIVU(N, M) (unlikely(M == 0) ? 0 : N / M) argument 48 unlikely((N == -N) && (M == (__typeof(N))(-1))) ? N : N / M) 50 unlikely((N == -N) && (M == (__typeof(N))(-1))) ? 0 : N % M) 56 #define DO_CLO_B(N) (clz32(~N & 0xff) - 24) argument 57 #define DO_CLO_H(N) (clz32(~N & 0xffff) - 16) argument 58 #define DO_CLO_W(N) (clz32(~N)) argument 59 #define DO_CLO_D(N) (clz64(~N)) argument 60 #define DO_CLZ_B(N) (clz32(N) - 24) argument 61 #define DO_CLZ_H(N) (clz32(N) - 16) argument 62 #define DO_CLZ_W(N) (clz32(N)) argument [all …]
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/qemu/hw/display/ |
H A D | tc6393xb.c | 194 case SCR_ ##N: return s->scr.N 196 case SCR_ ##N: return s->scr.N; \ 197 case SCR_ ##N + 1: return s->scr.N >> 8; 199 case SCR_ ##N: return s->scr.N; \ 200 case SCR_ ##N + 1: return s->scr.N >> 8; \ 202 case SCR_ ##N + 3: return s->scr.N >> 24; 206 case SCR_ ##N(2): return s->scr.N[2] 255 case SCR_ ##N: s->scr.N = value; return; 257 case SCR_ ##N: s->scr.N = (s->scr.N & ~0xff) | (value & 0xff); return; \ 258 case SCR_ ##N + 1: s->scr.N = (s->scr.N & 0xff) | (value << 8); return [all …]
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/qemu/tests/unit/ |
H A D | test-qht.c | 11 #define N 5000 macro 198 insert(0, N); in qht_do_test() 200 check_n(N); in qht_do_test() 202 iter_check(N); in qht_do_test() 206 insert(N, N * 2); in qht_do_test() 207 check_n(N + N - 1); in qht_do_test() 208 rm(N, N * 2); in qht_do_test() 211 check_n(N); in qht_do_test() 218 check_n(N); in qht_do_test() 221 insert(0, N); in qht_do_test() [all …]
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/qemu/target/hexagon/ |
H A D | macros.h | 274 #define fZXTN(N, M, VAL) (((N) != 0) ? extract64((VAL), 0, (N)) : 0LL) 275 #define fSXTN(N, M, VAL) (((N) != 0) ? sextract64((VAL), 0, (N)) : 0LL) 277 ((fSXTN(N, 64, VAL) == (VAL)) ? (VAL) : fSATVALN(N, VAL)) 279 ((fSXTN(N, 64, VAL) == (VAL)) ? (VAL) : fVSATVALN(N, VAL)) 305 ((fZXTN(N, 64, VAL) == (VAL)) ? (VAL) : fSATUVALN(N, VAL)) 418 #define fRNDN(A, N) ((((N) == 0) ? (A) : (((fSE32_64(A)) + (1 << ((N) - 1)))))) 419 #define fCRNDN(A, N) (conv_round(A, N)) 474 #define fSCALE(N, A) (((int64_t)(A)) << N) 584 #define fGETHALF(N, SRC) gen_get_half(HALF, N, SRC, true) 585 #define fGETUHALF(N, SRC) gen_get_half(HALF, N, SRC, false) [all …]
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H A D | genptr.h | 55 void gen_set_byte_i64(int N, TCGv_i64 result, TCGv src); 56 TCGv gen_get_byte(TCGv result, int N, TCGv src, bool sign); 57 TCGv gen_get_byte_i64(TCGv result, int N, TCGv_i64 src, bool sign); 58 TCGv gen_get_half(TCGv result, int N, TCGv src, bool sign); 59 void gen_set_half(int N, TCGv result, TCGv src); 60 void gen_set_half_i64(int N, TCGv_i64 result, TCGv src);
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/qemu/tests/tcg/cris/libc/ |
H A D | check_swap.c | 7 #define N 8 macro 16 case N: asm ("swapn\t%0\n" : "+r" (x) : "0" (x)); break; in cris_swap() 24 case N|R: asm ("swapnr\t%0\n" : "+r" (x) : "0" (x)); break; in cris_swap() 25 case N|B: asm ("swapnb\t%0\n" : "+r" (x) : "0" (x)); break; in cris_swap() 50 if (cris_swap(N, 0) != 0xffffffff) in check_swap() 63 verify_swap(N, 0x78134452, 0x87ecbbad, 1, 0); in check_swap() 64 verify_swap(N|R, 0x78134452, 0xe137ddb5, 1, 0); in check_swap() 65 verify_swap(N|B, 0x78134452, 0xec87adbb, 1, 0); in check_swap() 66 verify_swap(N|B|R, 0x78134452, 0x37e1b5dd, 0, 0); in check_swap() 67 verify_swap(N|W, 0x78134452, 0xbbad87ec, 1, 0); in check_swap() [all …]
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/qemu/tests/tcg/loongarch64/ |
H A D | test_bit.c | 5 #define TEST_CLO(N) \ argument 6 static uint64_t test_clo_##N(uint64_t rj) \ 10 asm volatile("clo."#N" %0, %1\n\t" \ 17 #define TEST_CLZ(N) \ argument 18 static uint64_t test_clz_##N(uint64_t rj) \ 22 asm volatile("clz."#N" %0, %1\n\t" \ 29 #define TEST_CTO(N) \ argument 30 static uint64_t test_cto_##N(uint64_t rj) \ 34 asm volatile("cto."#N" %0, %1\n\t" \ 41 #define TEST_CTZ(N) \ argument [all …]
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H A D | test_div.c | 5 #define TEST_DIV(N, M) \ argument 6 static void test_div_ ##N(uint ## M ## _t rj, \ 12 asm volatile("div."#N" %0,%1,%2\n\t" \ 19 #define TEST_MOD(N, M) \ argument 20 static void test_mod_ ##N(uint ## M ## _t rj, \ 26 asm volatile("mod."#N" %0,%1,%2\n\t" \
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H A D | test_pcadd.c | 5 #define TEST_PCADDU(N) \ argument 6 void test_##N(int a) \ 12 asm volatile(""#N" %0, 0x104\n\t" \ 13 ""#N" %1, 0x12345\n\t" \ 17 if (!strcmp(#N, "pcalau12i")) { \
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H A D | test_fclass.c | 15 #define TEST_FCLASS(N) \ argument 16 void test_fclass_##N(long s) \ 21 asm volatile("fclass."#N" %0, %2\n\t" \ 22 "movfr2gr."#N" %1, %2\n\t" \ 39 printf("fclass."#N" test failed.\n"); \
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H A D | test_fpcom.c | 3 #define TEST_COMP(N) \ argument 4 void test_##N(float fj, float fk) \ 8 asm volatile("fcmp."#N".s $fcc6,%1,%2\n" \
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/qemu/target/arm/tcg/ |
H A D | mve_helper.c | 821 #define DO_NOT(N) (~(N)) argument 825 #define DO_ABS(N) ((N) < 0 ? -(N) : (N)) argument 837 #define DO_NEG(N) (-(N)) argument 962 #define DO_ADD(N, M) ((N) + (M)) argument 963 #define DO_SUB(N, M) ((N) - (M)) argument 964 #define DO_MUL(N, M) ((N) * (M)) argument 1041 #define DO_MAX(N, M) ((N) >= (M) ? (N) : (M)) argument 1042 #define DO_MIN(N, M) ((N) >= (M) ? (M) : (N)) argument 1049 #define DO_ABD(N, M) ((N) >= (M) ? (N) - (M) : (M) - (N)) in DO_2OP_S() argument 2665 #define DO_LT(N, M) ((N) < (M)) argument [all …]
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H A D | sve_helper.c | 204 #define DO_MAX(N, M) ((N) >= (M) ? (N) : (M)) argument 205 #define DO_MIN(N, M) ((N) >= (M) ? (M) : (N)) argument 206 #define DO_ABD(N, M) ((N) >= (M) ? (N) - (M) : (M) - (N)) argument 334 #define DO_ASR(N, M) (N >> MIN(M, sizeof(N) * 8 - 1)) in DO_ZPZZ() argument 335 #define DO_LSR(N, M) (M < sizeof(N) * 8 ? N >> M : 0) in DO_ZPZZ() argument 336 #define DO_LSL(N, M) (M < sizeof(N) * 8 ? N << M : 0) in DO_ZPZZ() argument 873 #define DO_FABS(N) (N & ((__typeof(N))-1 >> 1)) argument 879 #define DO_FNEG(N) (N ^ ~((__typeof(N))-1 >> 1)) argument 885 #define DO_NOT(N) (~N) argument 913 #define DO_ABS(N) (N < 0 ? -N : N) argument [all …]
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/qemu/target/hexagon/imported/ |
H A D | mpy.idef | 203 #define vmac_sema(N)\ 212 #define vmac_sema(N)\ 220 #define vmac_sema(N)\ 229 #define vmac_sema(N)\ 239 #define vmac_sema(N)\ 248 #define vmac_sema(N)\ 255 #define vmac_sema(N)\ 263 #define vmac_sema(N)\ 271 #define vmac_sema(N)\ 287 #define vmac_sema(N)\ [all …]
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H A D | macros.def | 193 ({fSET_OVERFLOW(); ((VAL) < 0) ? (-(1LL<<((N)-1))) : ((1LL<<((N)-1))-1);}), 199 ({((VAL) < 0) ? (-(1LL<<((N)-1))) : ((1LL<<((N)-1))-1);}), 211 ((fZXTN(N,M,VAL) ^ (1LL<<((N)-1))) - (1LL<<((N)-1))), 217 ((fSXTN(N,64,VAL) == (VAL)) ? (VAL) : fSATVALN(N,VAL)), 222 ((fSXTN(N,64,VAL) == (VAL)) ? (VAL) : fVSATVALN(N,VAL)), 256 ((fZXTN(N,64,VAL) == (VAL)) ? (VAL) : fVSATUVALN(N,VAL)), 262 ((fZXTN(N,64,VAL) == (VAL)) ? (VAL) : fSATUVALN(N,VAL)), 819 ((((N)==0)?(A):(((fSE32_64(A))+(1<<((N)-1)))))), 825 (conv_round(A,N)), 1441 DST = (DST & ~(1ULL<<(N))) | (((size8u_t)(VAL))<<(N)); [all …]
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/qemu/tests/tcg/alpha/ |
H A D | test-cond.c | 5 #define TEST_COND(N) \ argument 6 int test_##N (long a) \ 10 asm ("cmov"#N" %1,$31,%0" \ 17 #define TEST_COND(N) \ argument 18 int test_##N (long a) \ 22 asm ("b"#N" %1,1f\n\t" \
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/qemu/docs/specs/ |
H A D | acpi_hest_ghes.rst | 50 |Generic Error Status Block N |<----------+ 67 (3) The address registers table contains N Error Block Address entries 68 and N Read Ack Register entries. The size for each entry is 8-byte. 69 The Error Status Data Block table contains N Error Status Data Block 71 for the "etc/hardware_errors" fw_cfg blob is (N * 8 * 2 + N * 4096) bytes. 72 N is the number of the kinds of hardware error sources. 78 (5) QEMU generates N ADD_POINTER commands, which patch addresses in the 82 (6) QEMU generates N ADD_POINTER commands, which patch addresses in the 86 (7) QEMU generates N ADD_POINTER commands for the firmware, which patch
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H A D | rocker.txt | 738 OF_DPA_VLAN_ID 2 (N) vlan ID 741 OF_DPA_NEW_VLAN_ID 2 (N) new vlan ID 752 OF_DPA_VLAN_ID 2 (N) vlan ID 780 OF_DPA_VLAN_ID 2 (N) vlan ID 785 OF_DPA_SRC_IP_MASK 4 (N) IP Mask 804 OF_DPA_VLAN_ID 2 (N) vlan ID 827 OF_DPA_ETHERTYPE 2 (N) ethertype 828 OF_DPA_VLAN_ID 2 (N) vlan ID 832 OF_DPA_SRC_MAC 6 (N) source MAC 841 OF_DPA_SRC_IP_MASK 4 (N) IP Mask [all …]
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/qemu/tests/qemu-iotests/ |
H A D | 172.out | 64 Attached to: /machine/unattached/device[N] 69 Attached to: /machine/unattached/device[N] 117 Attached to: /machine/unattached/device[N] 122 Attached to: /machine/unattached/device[N] 126 Attached to: /machine/unattached/device[N] 174 Attached to: /machine/unattached/device[N] 179 Attached to: /machine/unattached/device[N] 184 Attached to: /machine/unattached/device[N] 261 Attached to: /machine/unattached/device[N] 266 Attached to: /machine/unattached/device[N] [all …]
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H A D | 186.out | 10 Attached to: /machine/peripheral-anon/device[N] 26 Attached to: /machine/peripheral-anon/device[N] 42 Attached to: /machine/peripheral-anon/device[N] 61 Attached to: /machine/peripheral-anon/device[N] 77 Attached to: /machine/peripheral-anon/device[N] 109 Attached to: /machine/peripheral-anon/device[N] 407 Attached to: /machine/unattached/device[N] 415 Attached to: /machine/unattached/device[N] 424 Attached to: /machine/unattached/device[N] 432 Attached to: /machine/unattached/device[N] [all …]
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/qemu/tests/tcg/aarch64/ |
H A D | sve-str.c | 4 #define N (256 + 16) macro 8 unsigned char buf[N]; in test() 11 for (int i = 0; i < N; ++i) { in test() 28 for (int i = vl; i < N; ++i) { in test()
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/qemu/docs/interop/ |
H A D | vhost-user-gpu.rst | 194 :request payload: N/A 202 :reply payload: N/A 208 :request payload: N/A 216 :reply payload: N/A 223 :reply payload: N/A 230 :reply payload: N/A 237 :reply payload: N/A 245 :reply payload: N/A 253 :reply payload: N/A 284 :reply payload: N/A
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H A D | vhost-user.rst | 1073 :reply payload: N/A 1101 :reply payload: N/A 1117 :reply payload: N/A 1126 :reply payload: N/A 1164 :reply payload: N/A 1177 :reply payload: N/A 1185 :reply payload: N/A 1193 :reply payload: N/A 1201 :reply payload: N/A 1253 :reply payload: N/A [all …]
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/qemu/tests/tcg/cris/bare/ |
H A D | testutils.inc | 48 .macro test_cc N Z V C 49 .if \N 91 .macro test_move_cc N Z V C 92 .if \N
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/qemu/target/hexagon/idef-parser/ |
H A D | idef-parser.lex | 136 "P"{PRED_ID}"N" { 317 "N"{LOWER_ID}"N" { yylval->rvalue.type = REGISTER_ARG; 387 "N" { yylval->rvalue.type = IMMEDIATE;
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