| /qemu/hw/scsi/ |
| H A D | mpi.h | 387 uint8_t Reserved; /* 06h */ member
455 uint8_t Reserved; /* 06h */ member
519 uint8_t Reserved; /* 04h */ member
586 uint8_t Reserved; /* 01h */ member
637 uint8_t Reserved; /* 01h */ member
657 uint8_t Reserved[2]; /* 00h */ member
748 uint8_t Reserved[2]; /* 00h */ member
758 uint16_t Reserved; /* 00h */ member
803 uint8_t Reserved[2]; /* 00h */ member
813 uint8_t Reserved[2]; /* 00h */ member
[all …]
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| /qemu/target/hexagon/imported/ |
| H A D | allextenc.def | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | allext.idef | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | allext_macros.def | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | allidefs.def | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | iclass.def | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | encode.def | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | system.idef | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| H A D | encode_pp.def | 2 * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
1046 DEF_FIELDROW_DESC32(ICLASS_M" 1011 -------- PP------ --------","[#11] Reserved")
1239 DEF_FIELDROW_DESC32( ICLASS_ALU2op" 0111 -------- PP------ --------","[#7] Reserved")
1246 DEF_FIELDROW_DESC32( ICLASS_ALU2op" 1001 -------- PP------ --------","[#9] Reserved")
1300 DEF_FIELDROW_DESC32(ICLASS_ALU3op" 0000 -------- PP------ --------","[#0] Reserved")
1357 DEF_FIELDROW_DESC32(ICLASS_ALU3op" 1000 -------- PP------ --------","[#8] Reserved")
1375 DEF_FIELDROW_DESC32(ICLASS_ALU3op" 1010 -------- PP------ --------","[#10] Reserved")
1390 DEF_FIELDROW_DESC32(ICLASS_ALU3op" 1100 -------- PP------ --------","[#12] Reserved")
1404 DEF_FIELDROW_DESC32(ICLASS_ALU3op" 1110 -------- PP------ --------","[#14] Reserved")
1873 DEF_FIELDROW_DESC32(ICLASS_S3op" 1101 -------- PP------ --------","[#13] Reserved")
[all …]
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| H A D | encode_subinsn.def | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
| /qemu/docs/interop/ |
| H A D | qcow2.txt | 128 Bits 5-63: Reserved (set to 0)
139 Bits 1-63: Reserved (set to 0)
324 4 - 7: Reserved, must be zero.
475 Bit 0 - 8: Reserved (set to 0)
528 Bit 0 - 8: Reserved (set to 0)
535 56 - 62: Reserved (set to 0)
569 1 - 8: Reserved (set to 0)
577 56 - 61: Reserved (set to 0)
652 Bit 0 - 63: Reserved (set to 0)
853 1 - 8: Reserved and must be zero.
[all …]
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| /qemu/target/hexagon/ |
| H A D | reg_fields_def.h.inc | 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
| H A D | attribs_def.h.inc | 2 * Copyright(c) 2019-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| /qemu/docs/specs/ |
| H A D | acpi_hw_reduced_hotplug.rst | 67 3-31: Reserved
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| H A D | standard-vga.rst | 32 Reserved (so we have the option to make the framebuffer bar 64bit).
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| H A D | rocker.txt | 36 o The use of RSVD or Reserved indicates that a bit or field is reserved for
65 0x18-28 Reserved
68 0x30-38 Reserved
75 0x42 2 Reserved
211 [1:31] Reserved
243 pad 2 Reserved
465 [1:31] Reserved
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| H A D | acpi_nvdimm.rst | 104 Reserved handles:
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| H A D | acpi_cpu_hotplug.rst | 41 Reserved registers behavior:
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| /qemu/tests/avocado/acpi-bits/bits-tests/ |
| H A D | smbios.py2 | 214 0: 'Reserved',
606 0b10: 'Reserved',
1038 0x00: 'Reserved',
1053 0x0F: 'Reserved',
1205 xrange(0x15, 0x17): 'Reserved',
1493 0b00: 'Reserved, do not use',
2029 xrange(0x04, 0xFF): 'Reserved'
2045 0b11: 'Reserved'
2104 xrange(0b1001, 0b1111): 'Reserved'
2214 0x00: 'Reserved',
[all …]
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| /qemu/target/i386/whpx/ |
| H A D | whpx-apic.c | 205 .Reserved = 0, in whpx_send_msi()
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| /qemu/target/ppc/translate/ |
| H A D | misc-impl.c.inc | 131 * ISA says that "Reserved fields in instructions are ignored
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| /qemu/tests/tcg/hexagon/ |
| H A D | v6mpy_ref.c.inc | 2 * Copyright(c) 2021-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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| /qemu/target/hexagon/idef-parser/ |
| H A D | macros.inc | 2 * Copyright(c) 2019-2022 rev.ng Labs Srl. All Rights Reserved.
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| /qemu/ui/ |
| H A D | vnc-enc-zrle.c.inc | 5 * Copyright (C) 2002 RealVNC Ltd. All Rights Reserved.
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| /qemu/hw/usb/ |
| H A D | dev-network.c | 433 le32 Reserved; member
475 le32 Reserved; member
|