Home
last modified time | relevance | path

Searched refs:box (Results 1 – 17 of 17) sorted by relevance

/qemu/contrib/vhost-user-gpu/
H A Dvirgl.c225 struct virtio_gpu_box box; in virgl_cmd_transfer_to_host_2d() local
229 box.x = t2d.r.x; in virgl_cmd_transfer_to_host_2d()
230 box.y = t2d.r.y; in virgl_cmd_transfer_to_host_2d()
231 box.z = 0; in virgl_cmd_transfer_to_host_2d()
232 box.w = t2d.r.width; in virgl_cmd_transfer_to_host_2d()
233 box.h = t2d.r.height; in virgl_cmd_transfer_to_host_2d()
234 box.d = 1; in virgl_cmd_transfer_to_host_2d()
241 (struct virgl_box *)&box, in virgl_cmd_transfer_to_host_2d()
258 (struct virgl_box *)&t3d.box, in virgl_cmd_transfer_to_host_3d()
275 (struct virgl_box *)&tf3d.box, in virgl_cmd_transfer_from_host_3d()
/qemu/hw/display/
H A Dvirtio-gpu-virgl.c243 struct virtio_gpu_box box; in virgl_cmd_transfer_to_host_2d() local
248 box.x = t2d.r.x; in virgl_cmd_transfer_to_host_2d()
249 box.y = t2d.r.y; in virgl_cmd_transfer_to_host_2d()
250 box.z = 0; in virgl_cmd_transfer_to_host_2d()
251 box.w = t2d.r.width; in virgl_cmd_transfer_to_host_2d()
252 box.h = t2d.r.height; in virgl_cmd_transfer_to_host_2d()
253 box.d = 1; in virgl_cmd_transfer_to_host_2d()
260 (struct virgl_box *)&box, in virgl_cmd_transfer_to_host_2d()
277 (struct virgl_box *)&t3d.box, in virgl_cmd_transfer_to_host_3d()
295 (struct virgl_box *)&tf3d.box, in virgl_cmd_transfer_from_host_3d()
H A Dvirtio-gpu-rutabaga.c405 transfer.x = t3d.box.x; in rutabaga_cmd_transfer_to_host_3d()
406 transfer.y = t3d.box.y; in rutabaga_cmd_transfer_to_host_3d()
407 transfer.z = t3d.box.z; in rutabaga_cmd_transfer_to_host_3d()
408 transfer.w = t3d.box.w; in rutabaga_cmd_transfer_to_host_3d()
409 transfer.h = t3d.box.h; in rutabaga_cmd_transfer_to_host_3d()
410 transfer.d = t3d.box.d; in rutabaga_cmd_transfer_to_host_3d()
434 transfer.x = t3d.box.x; in rutabaga_cmd_transfer_from_host_3d()
435 transfer.y = t3d.box.y; in rutabaga_cmd_transfer_from_host_3d()
436 transfer.z = t3d.box.z; in rutabaga_cmd_transfer_from_host_3d()
437 transfer.w = t3d.box.w; in rutabaga_cmd_transfer_from_host_3d()
[all …]
/qemu/ui/
H A Ddbus-listener.c572 pixman_box32_t *box; in dbus_gl_refresh() local
573 box = pixman_region32_rectangles(&ddl->gl_damage, NULL) + i; in dbus_gl_refresh()
575 dbus_call_update_gl(dcl, box->x1, box->y1, in dbus_gl_refresh()
576 box->x2 - box->x1, box->y2 - box->y1); in dbus_gl_refresh()
H A Dgtk.c1934 GtkWidget *box; in gd_vc_vte_init() local
1975 box = gtk_box_new(GTK_ORIENTATION_HORIZONTAL, 2); in gd_vc_vte_init()
1978 gtk_box_pack_end(GTK_BOX(box), scrollbar, FALSE, FALSE, 0); in gd_vc_vte_init()
1979 gtk_box_pack_end(GTK_BOX(box), vc->vte.terminal, TRUE, TRUE, 0); in gd_vc_vte_init()
1981 vc->vte.box = box; in gd_vc_vte_init()
1988 vc->tab_item = box; in gd_vc_vte_init()
H A Dcocoa.m271 /* Displays an alert dialog box with the specified message */
1478 /* Displays a dialog box asking the user to select an image file to load.
/qemu/docs/specs/
H A Dpci-serial.rst9 guests work out-of-the box with all cards. There is a Windows inf file
/qemu/docs/system/arm/
H A Drealview.rst6 certain Linux kernel configurations work out of the box on these boards.
/qemu/include/ui/
H A Dgtk.h65 GtkWidget *box; member
/qemu/include/standard-headers/linux/
H A Dvirtio_gpu.h256 struct virtio_gpu_box box; member
/qemu/docs/sphinx-static/
H A Dtheme_overrides.css47 box-shadow: 0 4px 8px 0 rgba(0,0,0,0.2), 0 3px 10px 0 rgba(0,0,0,0.19);
/qemu/docs/system/devices/
H A Dvirtio-gpu.rst50 Mesa's implementations (LLVMpipe, Lavapipe and virgl below) work out of box
/qemu/docs/system/ppc/
H A Damigang.rst149 The only Linux distro that supported Sam460ex out of box was CruxPPC
/qemu/docs/system/
H A Dvnc-security.rst23 This ensures that only users on local box with read/write access to that
/qemu/docs/system/riscv/
H A Dsifive_u.rst313 board on QEMU ``sifive_u`` machine out of the box. This allows users to
/qemu/docs/devel/
H A Dkconfig.rst43 configuration and dependencies can be treated as a black box when building
/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc2280 /* NaN-box f[rs1] */
2626 /* NaN-box f[rs1] */
2644 /* NaN-box f[rs1] */
3340 /* NaN-box f[rd] as necessary for SEW */
3370 /* NaN-box f[rs1] */