| /qemu/target/arm/tcg/ |
| H A D | helper-a64.c | 231 return float16_muladd(a, b, float16_two, 0, fpst); in HELPER()
276 return float16_muladd(a, b, float16_three, float_muladd_halve_result, fpst); in HELPER()
591 return float16_muladd(a, b, c, 0, fpst); in ADVSIMD_TWOHALFOP()
606 r1 = float16_muladd(a1, b1, c1, 0, fpst); in HELPER()
607 r2 = float16_muladd(a2, b2, c2, 0, fpst); in HELPER()
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| H A D | vec_helper.c | 893 d[H2(i)] = float16_muladd(e2, e1, a[H2(i)], 0, fpst); in HELPER()
894 d[H2(i + 1)] = float16_muladd(e4, e3, a[H2(i + 1)], 0, fpst); in HELPER()
927 d[H2(j)] = float16_muladd(e2, e1, a[H2(j)], 0, fpst); in HELPER()
928 d[H2(j + 1)] = float16_muladd(e4, e3, a[H2(j + 1)], 0, fpst); in HELPER()
1403 return float16_muladd(op1, op2, dest, 0, stat); in float16_muladd_f()
1421 return float16_muladd(float16_chs(op1), op2, dest, 0, stat); in float16_mulsub_f()
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| H A D | mve_helper.c | 3017 #define DO_VCMLAH(N, M, D, S) float16_muladd(N, M, D, 0, S)
3101 #define DO_VFMAS_SCALARH(N, M, D, F, S) float16_muladd(N, D, M, F, S)
3105 DO_2OP_FP_ACC_SCALAR(vfma_scalarh, 2, float16, float16_muladd)
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| H A D | sve_helper.c | 4751 r = float16_muladd(e1, e2, e3, 0, status); in DO_ZPZ_FP()
5001 d[i] = float16_muladd(n[i], mm, coeff[xx], 0, vs);
5190 d = float16_muladd(e2, e1, d, 0, status); in HELPER()
5195 d = float16_muladd(e4, e3, d, 0, status); in HELPER()
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| /qemu/target/riscv/ |
| H A D | vector_helper.c | 3153 return float16_muladd(a, b, d, 0, s);
3191 return float16_muladd(a, b, d, float_muladd_negate_c |
3222 return float16_muladd(a, b, d, float_muladd_negate_c, s); in RVVCALL()
3250 return float16_muladd(a, b, d, float_muladd_negate_product, s); in RVVCALL()
3278 return float16_muladd(d, b, a, 0, s); in RVVCALL()
3306 return float16_muladd(d, b, a, float_muladd_negate_c | in RVVCALL()
3337 return float16_muladd(d, b, a, float_muladd_negate_c, s); in RVVCALL()
3365 return float16_muladd(d, b, a, float_muladd_negate_product, s); in RVVCALL()
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| H A D | fpu_helper.c | 127 return nanbox_h(env, float16_muladd(frs1, frs2, frs3, flags, in do_fmadd_h()
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| /qemu/tests/fp/ |
| H A D | wrap.c.inc | 572 WRAP_MULADD(qemu_f16_mulAdd, float16_muladd, float16)
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| /qemu/target/arm/ |
| H A D | vfp_helper.c | 996 return float16_muladd(a, b, c, 0, fpst); in VFP_HELPER()
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| /qemu/include/fpu/ |
| H A D | softfloat.h | 240 float16 float16_muladd(float16, float16, float16, int, float_status *status);
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| /qemu/fpu/ |
| H A D | softfloat.c | 2215 float16 QEMU_FLATTEN float16_muladd(float16 a, float16 b, float16 c, in float16_muladd() function
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