Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4 |
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#
00f9ef8f |
| 31-May-2023 |
LIU Zhiwei <zhiwei_liu@linux.alibaba.com> |
fpu: Add conversions between bfloat16 and [u]int8
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <202305310654
fpu: Add conversions between bfloat16 and [u]int8
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <20230531065458.2082-1-zhiwei_liu@linux.alibaba.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4 |
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#
00f9ef8f |
| 31-May-2023 |
LIU Zhiwei <zhiwei_liu@linux.alibaba.com> |
fpu: Add conversions between bfloat16 and [u]int8
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <202305310654
fpu: Add conversions between bfloat16 and [u]int8
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <20230531065458.2082-1-zhiwei_liu@linux.alibaba.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.2, v8.0.1, v7.2.3 |
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e2041f4d |
| 27-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
fpu: Add float64_to_int{32,64}_modulo
Add versions of float64_to_int* which do not saturate the result.
Reviewed-by: Christoph Muellner <christoph.muellner@vrull.eu> Tested-by: Christoph Muellner <
fpu: Add float64_to_int{32,64}_modulo
Add versions of float64_to_int* which do not saturate the result.
Reviewed-by: Christoph Muellner <christoph.muellner@vrull.eu> Tested-by: Christoph Muellner <christoph.muellner@vrull.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230527141910.1885950-2-richard.henderson@linaro.org>
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Revision tags: v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0, v7.2.0, v7.2.0-rc4, v7.2.0-rc3, v7.2.0-rc2, v7.2.0-rc1, v7.2.0-rc0, v7.1.0, v7.1.0-rc4, v7.1.0-rc3, v7.1.0-rc2, v7.1.0-rc1, v7.1.0-rc0, v7.0.0, v7.0.0-rc4, v7.0.0-rc3 |
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#
bea59230 |
| 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add float128_to_int128
Implements float128_to_int128 based on parts_float_to_int logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richa
softfloat: add float128_to_int128
Implements float128_to_int128 based on parts_float_to_int logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-7-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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4de49ddf |
| 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add float128_to_uint128
Implements float128_to_uint128 based on parts_float_to_uint logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <ri
softfloat: add float128_to_uint128
Implements float128_to_uint128 based on parts_float_to_uint logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-6-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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95c1b71e |
| 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add int128_to_float128
Based on parts_sint_to_float, implements int128_to_float128 to convert a signed 128-bit value received through an Int128 argument.
Signed-off-by: Matheus Ferst <ma
softfloat: add int128_to_float128
Based on parts_sint_to_float, implements int128_to_float128 to convert a signed 128-bit value received through an Int128 argument.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220330175932.6995-5-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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f279852b |
| 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add uint128_to_float128
Based on parts_uint_to_float, implements uint128_to_float128 to convert an unsigned 128-bit value received through an Int128 argument.
Signed-off-by: Matheus Fers
softfloat: add uint128_to_float128
Based on parts_uint_to_float, implements uint128_to_float128 to convert an unsigned 128-bit value received through an Int128 argument.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-4-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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Revision tags: v7.0.0-rc2, v7.0.0-rc1, v7.0.0-rc0, v6.1.1 |
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42636fb9 |
| 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add float64r32 arithmetic routines
These variants take a float64 as input, compute the result to infinite precision (as we do with FloatParts), round the result to the precision and dynam
softfloat: Add float64r32 arithmetic routines
These variants take a float64 as input, compute the result to infinite precision (as we do with FloatParts), round the result to the precision and dynamic range of float32, and then return the result in the format of float64.
This is the operation PowerPC requires for its float32 operations.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211119160502.17432-28-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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149a48f6 |
| 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Extend float_exception_flags to 16 bits
We will shortly have more than 8 bits of exceptions. Repack the existing flags into low bits and reformat to hex.
Signed-off-by: Richard Henderson
softfloat: Extend float_exception_flags to 16 bits
We will shortly have more than 8 bits of exceptions. Repack the existing flags into low bits and reformat to hex.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211119160502.17432-2-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Revision tags: v6.2.0, v6.2.0-rc4, v6.2.0-rc3, v6.2.0-rc2, v6.2.0-rc1, v6.2.0-rc0, v6.0.1 |
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0e903037 |
| 21-Oct-2021 |
Chih-Min Chao <chihmin.chao@sifive.com> |
softfloat: add APIs to handle alternative sNaN propagation for fmax/fmin
For "fmax/fmin ft0, ft1, ft2" and if one of the inputs is sNaN,
The original logic: Return NaN and set invalid flag if
softfloat: add APIs to handle alternative sNaN propagation for fmax/fmin
For "fmax/fmin ft0, ft1, ft2" and if one of the inputs is sNaN,
The original logic: Return NaN and set invalid flag if ft1 == sNaN || ft2 == sNan.
The alternative path: Set invalid flag if ft1 == sNaN || ft2 == sNaN. Return NaN only if ft1 == NaN && ft2 == NaN.
The IEEE 754 spec allows both implementation and some architecture such as riscv choose different defintions in two spec versions. (riscv-spec-v2.2 use original version, riscv-spec-20191213 changes to alternative)
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211021160847.2748577-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Revision tags: v6.1.0, v6.1.0-rc4, v6.1.0-rc3, v6.1.0-rc2, v6.1.0-rc1, v6.1.0-rc0, v6.0.0, v6.0.0-rc5, v6.0.0-rc4, v6.0.0-rc3, v6.0.0-rc2, v6.0.0-rc1, v6.0.0-rc0, v5.2.0, v5.2.0-rc4, v5.2.0-rc3 |
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#
8da5f1db |
| 21-Nov-2020 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Introduce Floatx80RoundPrec
Use an enumeration instead of raw 32/64/80 values.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linar
softfloat: Introduce Floatx80RoundPrec
Use an enumeration instead of raw 32/64/80 values.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
ceebc129 |
| 17-May-2021 |
David Hildenbrand <david@redhat.com> |
softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag)
The float128 implementation is straight-forward. Unfortuantely, we don't have any tests we can simply adjust/unlock.
Signed
softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag)
The float128 implementation is straight-forward. Unfortuantely, we don't have any tests we can simply adjust/unlock.
Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210517142739.38597-24-david@redhat.com> [rth: Update for changed parts_minmax return value] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v5.2.0-rc2, v5.2.0-rc1, v5.2.0-rc0 |
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#
dedd123c |
| 24-Oct-2020 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Move muladd_floats to softfloat-parts.c.inc
Rename to parts$N_muladd. Implement float128_muladd with FloatParts128.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richa
softfloat: Move muladd_floats to softfloat-parts.c.inc
Rename to parts$N_muladd. Implement float128_muladd with FloatParts128.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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622090ae |
| 21-Oct-2020 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Inline float_raise
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v5.0.1 |
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c53b1079 |
| 16-Aug-2020 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Define comparison operations for bfloat16
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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5ebf5f4b |
| 13-Aug-2020 |
LIU Zhiwei <zhiwei_liu@c-sky.com> |
softfloat: Define misc operations for bfloat16
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-4-zhiwe
softfloat: Define misc operations for bfloat16
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-4-zhiwei_liu@c-sky.com> [rth: Fix merge conflict with NO_SIGNALING_NANS; use bool for predicates.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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34f0c0a9 |
| 13-Aug-2020 |
LIU Zhiwei <zhiwei_liu@c-sky.com> |
softfloat: Define convert operations for bfloat16
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-3-zh
softfloat: Define convert operations for bfloat16
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-3-zhiwei_liu@c-sky.com> [rth: Use FloatRoundMode for conversion functions.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
8282310d |
| 13-Aug-2020 |
LIU Zhiwei <zhiwei_liu@c-sky.com> |
softfloat: Define operations for bfloat16
This patch implements operations for bfloat16 except conversion and some misc operations. We also add FloatFmt and pack/unpack interfaces for bfloat16. As t
softfloat: Define operations for bfloat16
This patch implements operations for bfloat16 except conversion and some misc operations. We also add FloatFmt and pack/unpack interfaces for bfloat16. As they are both static fields, we can't make a sperate patch for them.
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-2-zhiwei_liu@c-sky.com> [rth: Use FloatRelation for comparison operations.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v5.1.0, v5.1.0-rc3, v5.1.0-rc2, v5.1.0-rc1, v5.1.0-rc0, v4.2.1 |
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#
a03e924c |
| 16-Jun-2020 |
Stephen Long <steplong@quicinc.com> |
softfloat: Add float16_is_normal
This float16 predicate was missing from the normal set.
Signed-off-by: Stephen Long <steplong@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linar
softfloat: Add float16_is_normal
This float16 predicate was missing from the normal set.
Signed-off-by: Stephen Long <steplong@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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0d93d8ec |
| 30-Jul-2020 |
Frank Chang <frank.chang@sifive.com> |
softfloat: Add fp16 and uint8/int8 conversion functions
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Frank Chang <frank.chang@sifive.com> Message-Id: <1596102747-20226-4-git-send
softfloat: Add fp16 and uint8/int8 conversion functions
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Frank Chang <frank.chang@sifive.com> Message-Id: <1596102747-20226-4-git-send-email-chihmin.chao@sifive.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
dd205025 |
| 30-Jul-2020 |
Kito Cheng <kito.cheng@sifive.com> |
softfloat: Implement the full set of comparisons for float16
Implement them in softfloat and remove the local versions in riscv.
Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Chi
softfloat: Implement the full set of comparisons for float16
Implement them in softfloat and remove the local versions in riscv.
Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1596102747-20226-2-git-send-email-chihmin.chao@sifive.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
163b3d1a |
| 24-Jul-2020 |
Laszlo Ersek <lersek@redhat.com> |
target/i386: floatx80: avoid compound literals in static initializers
Quoting ISO C99 6.7.8p4, "All the expressions in an initializer for an object that has static storage duration shall be constant
target/i386: floatx80: avoid compound literals in static initializers
Quoting ISO C99 6.7.8p4, "All the expressions in an initializer for an object that has static storage duration shall be constant expressions or string literals".
The compound literal produced by the make_floatx80() macro is not such a constant expression, per 6.6p7-9. (An implementation may accept it, according to 6.6p10, but is not required to.)
Therefore using "floatx80_zero" and make_floatx80() for initializing "f2xm1_table" and "fpatan_table" is not portable. And gcc-4.8 in RHEL-7.6 actually chokes on them:
> target/i386/fpu_helper.c:871:5: error: initializer element is not constant > { make_floatx80(0xbfff, 0x8000000000000000ULL), > ^
We've had the make_floatx80_init() macro for this purpose since commit 3bf7e40ab914 ("softfloat: fix for C99", 2012-03-17), so let's use that macro again.
Fixes: eca30647fc0 ("target/i386: reimplement f2xm1 using floatx80 operations") Fixes: ff57bb7b632 ("target/i386: reimplement fpatan using floatx80 operations") Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Joseph Myers <joseph@codesourcery.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Link: https://lists.gnu.org/archive/html/qemu-devel/2017-08/msg06566.html Link: https://lists.gnu.org/archive/html/qemu-devel/2020-07/msg04714.html Message-Id: <20200716144251.23004-1-lersek@redhat.com> Message-Id: <20200724064509.331-8-alex.bennee@linaro.org>
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#
d159dd05 |
| 12-Jun-2020 |
Laurent Vivier <laurent@vivier.eu> |
softfloat,m68k: disable floatx80_invalid_encoding() for m68k
According to the comment, this definition of invalid encoding is given by intel developer's manual, and doesn't comply with 680x0 FPU.
W
softfloat,m68k: disable floatx80_invalid_encoding() for m68k
According to the comment, this definition of invalid encoding is given by intel developer's manual, and doesn't comply with 680x0 FPU.
With m68k, the explicit integer bit can be zero in the case of: - zeros (exp == 0, mantissa == 0) - denormalized numbers (exp == 0, mantissa != 0) - unnormalized numbers (exp != 0, exp < 0x7FFF) - infinities (exp == 0x7FFF, mantissa == 0) - not-a-numbers (exp == 0x7FFF, mantissa != 0)
For infinities and NaNs, the explicit integer bit can be either one or zero.
The IEEE 754 standard does not define a zero integer bit. Such a number is an unnormalized number. Hardware does not directly support denormalized and unnormalized numbers, but implicitly supports them by trapping them as unimplemented data types, allowing efficient conversion in software.
See "M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL", "1.6 FLOATING-POINT DATA TYPES"
We will implement in the m68k TCG emulator the FP_UNIMP exception to trap into the kernel to normalize the number. In case of linux-user, the number will be normalized by QEMU.
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200612140400.2130118-1-laurent@vivier.eu>
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#
445810ec |
| 08-Jun-2020 |
Joseph Myers <joseph@codesourcery.com> |
softfloat: return low bits of quotient from floatx80_modrem
Both x87 and m68k need the low parts of the quotient for their remainder operations. Arrange for floatx80_modrem to track those bits and
softfloat: return low bits of quotient from floatx80_modrem
Both x87 and m68k need the low parts of the quotient for their remainder operations. Arrange for floatx80_modrem to track those bits and return them via a pointer.
The architectures using float32_rem and float64_rem do not appear to need this information, so the *_rem interface is left unchanged and the information returned only from floatx80_modrem. The logic used to determine the low 7 bits of the quotient for m68k (target/m68k/fpu_helper.c:make_quotient) appears completely bogus (it looks at the result of converting the remainder to integer, the quotient having been discarded by that point); this patch does not change that, but the m68k maintainers may wish to do so.
Signed-off-by: Joseph Myers <joseph@codesourcery.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <alpine.DEB.2.21.2006081656500.23637@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
6b8b0136 |
| 08-Jun-2020 |
Joseph Myers <joseph@codesourcery.com> |
softfloat: merge floatx80_mod and floatx80_rem
The m68k-specific softfloat code includes a function floatx80_mod that is extremely similar to floatx80_rem, but computing the remainder based on trunc
softfloat: merge floatx80_mod and floatx80_rem
The m68k-specific softfloat code includes a function floatx80_mod that is extremely similar to floatx80_rem, but computing the remainder based on truncating the quotient toward zero rather than rounding it to nearest integer. This is also useful for emulating the x87 fprem and fprem1 instructions. Change the floatx80_rem implementation into floatx80_modrem that can perform either operation, with both floatx80_rem and floatx80_mod as thin wrappers available for all targets.
There does not appear to be any use for the _mod operation for other floating-point formats in QEMU (the only other architectures using _rem at all are linux-user/arm/nwfpe, for FPA emulation, and openrisc, for instructions that have been removed in the latest version of the architecture), so no change is made to the code for other formats.
Signed-off-by: Joseph Myers <joseph@codesourcery.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <alpine.DEB.2.21.2006081654280.23637@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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