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/qemu/docs/system/devices/
H A Dvirtio-gpu.rst33 into VGA and non-VGA variants. The VGA ones are prefixed with virtio-vga
34 or vhost-user-vga while the non-VGA ones are prefixed with virtio-gpu or
37 The VGA ones always use the PCI interface, but for the non-VGA ones, the
/qemu/tests/tcg/cris/bare/
H A Dcheck_movpr.s4 # Test generic "move Ps,Rd" and "move Rs,Pd" insns; the ones with
H A Dcheck_movmp.s4 # Test generic "move Ps,[]" and "move [],Pd" insns; the ones with
/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc954 TCGv ones = tcg_constant_tl(-1);
956 return do_csrrw(ctx, a->rd, a->csr, ones, mask);
962 TCGv ones = tcg_constant_tl(-1);
965 return do_csrrw_i128(ctx, a->rd, a->csr, ones, ones, maskl, maskh);
1044 TCGv ones = tcg_constant_tl(-1);
1046 return do_csrrw(ctx, a->rd, a->csr, ones, mask);
1052 TCGv ones = tcg_constant_tl(-1);
1054 return do_csrrw_i128(ctx, a->rd, a->csr, ones, ones, mask, ctx->zero);
/qemu/docs/devel/migration/
H A Dcompatibility.rst37 start with the trivial ones, QEMU is the same on source and
50 This are the easiest ones, we will not talk more about them in this
70 Now it comes the interesting ones, when both QEMU processes are
310 the device needs a way to configure which ones it is going to use.
359 The relevant bits of the commit for our example are this ones::
472 Now the interesting ones. When the QEMU processes versions are
479 This two are the ones that work. The whole point of making the
H A Dvfio.rst29 the device, but the device can respond to incoming ones. Additionally, all
/qemu/docs/specs/
H A Dacpi_hw_reduced_hotplug.rst7 events, including the hotplug ones. GED is modelled as a device
H A Dppc-xive.rst135 acknowledgment among other things. The most important ones being :
H A Dfw_cfg.rst163 items, and up to 0x4000 architecturally specific ones.
/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc755 tcg_gen_shrv_vec(vece, t0, ones, t0);
756 tcg_gen_shrv_vec(vece, t1, ones, t1);
940 ones = tcg_constant_i64(-1);
952 tcg_gen_shr_i64(ml, ones, t0);
963 tcg_gen_shr_i64(tl, ones, t0);
2275 tcg_gen_shr_i64(tmp, ones, tmp);
2277 tcg_gen_shl_i64(tmp, ones, tmp);
2283 tmp, ones);
2287 ml, ones);
2290 tmp, ones);
[all …]
/qemu/net/
H A Dvmnet-common.m181 * write left ones in temporary buffer and only after this
226 /* And read new ones from vmnet if VmnetState buffer is ready */
/qemu/target/hexagon/
H A Dgenptr.c466 TCGv ones = tcg_constant_tl(0xff); in gen_8bitsof() local
467 tcg_gen_movcond_tl(TCG_COND_NE, result, value, zero, ones, zero); in gen_8bitsof()
1301 TCGv_i64 ones = tcg_constant_i64(~0); in vec_to_qvec() local
1309 tcg_gen_movcond_i64(TCG_COND_NE, bits, word, zero, ones, zero); in vec_to_qvec()
/qemu/docs/system/arm/
H A Dmps2.rst78 with the third UART being the first of the shared ones.)
/qemu/docs/devel/
H A Dci-runners.rst.inc8 ones provided by GitLab as "shared runners".
H A Dmulti-process.rst368 read-only, but certain registers (especially BAR and MSI-related ones)
378 methods with ones that forward these operations to the emulation
718 device type. *KVM\_DEV\_TYPE\_USER* ones will need several commands:
948 emulation ones from accessing guest disk images. Similarly, network
H A Dfuzzing.rst60 write new ones to the first one specified.
H A Dkconfig.rst202 board (and not ones which are very board-specific or that need
/qemu/target/arm/tcg/
H A Dgengvec.c300 TCGv_vec ones = tcg_temp_new_vec_matching(d); in gen_srshr_vec() local
303 tcg_gen_dupi_vec(vece, ones, 1); in gen_srshr_vec()
304 tcg_gen_and_vec(vece, t, t, ones); in gen_srshr_vec()
495 TCGv_vec ones = tcg_temp_new_vec_matching(d); in gen_urshr_vec() local
498 tcg_gen_dupi_vec(vece, ones, 1); in gen_urshr_vec()
499 tcg_gen_and_vec(vece, t, t, ones); in gen_urshr_vec()
/qemu/docs/
H A Dthrottle.txt56 mandatory, so we must set to 0 the ones that we don't want to limit:
147 request instead of several smaller ones.
H A Dimage-fuzzer.txt111 of bits are set to ones. All fuzzed values are checked on non-equality to the
/qemu/target/hppa/
H A Dtranslate.c1037 uint64_t ones = 0, sgns = 0; in do_unit_zero_cond() local
1042 ones = d_repl; in do_unit_zero_cond()
1047 ones = d_repl * 0x01010101u; in do_unit_zero_cond()
1048 sgns = ones << 7; in do_unit_zero_cond()
1051 ones = d_repl * 0x00010001u; in do_unit_zero_cond()
1052 sgns = ones << 15; in do_unit_zero_cond()
1055 if (ones == 0) { in do_unit_zero_cond()
1065 tcg_gen_subi_i64(tmp, res, ones); in do_unit_zero_cond()
/qemu/docs/system/
H A Dreplay.rst73 events (e.g. keyboard input) and simulating deterministic ones (e.g. reading
/qemu/docs/system/riscv/
H A Dsifive_u.rst33 that the RISC-V cores are replaced by the 32-bit ones (E31 and U34), to help
/qemu/target/ppc/
H A Dint_helper.c647 uint32_t ones = (uint32_t)-1; \
648 uint32_t all = ones; \
660 result = ones; \
/qemu/docs/interop/
H A Dqmp-spec.rst148 Only a few commands support out-of-band execution. The ones that do

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