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Searched refs:pci_conf (Results 1 – 25 of 35) sorted by relevance

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/qemu/hw/usb/
H A Dhcd-ehci-pci.c37 uint8_t *pci_conf = dev->config; in usb_ehci_pci_realize() local
55 pci_conf[0x64] = 0x00; in usb_ehci_pci_realize()
56 pci_conf[0x65] = 0x00; in usb_ehci_pci_realize()
57 pci_conf[0x66] = 0x00; in usb_ehci_pci_realize()
58 pci_conf[0x67] = 0x00; in usb_ehci_pci_realize()
59 pci_conf[0x68] = 0x01; in usb_ehci_pci_realize()
60 pci_conf[0x69] = 0x00; in usb_ehci_pci_realize()
61 pci_conf[0x6a] = 0x00; in usb_ehci_pci_realize()
63 pci_conf[0x6c] = 0x00; in usb_ehci_pci_realize()
64 pci_conf[0x6d] = 0x00; in usb_ehci_pci_realize()
[all …]
H A Dvt82c686-uhci-pci.c15 uint8_t *pci_conf = s->dev.config; in usb_uhci_vt82c686b_realize() local
18 pci_set_long(pci_conf + 0x40, 0x00001000); in usb_uhci_vt82c686b_realize()
20 pci_set_long(pci_conf + 0x80, 0x00020001); in usb_uhci_vt82c686b_realize()
22 pci_set_long(pci_conf + 0xc0, 0x00002000); in usb_uhci_vt82c686b_realize()
H A Dhcd-uhci.c308 uint8_t *pci_conf; in uhci_reset() local
314 pci_conf = s->dev.config; in uhci_reset()
316 pci_conf[0x6a] = 0x01; /* usb clock */ in uhci_reset()
317 pci_conf[0x6b] = 0x00; in uhci_reset()
1166 uint8_t *pci_conf = s->dev.config; in usb_uhci_common_realize() local
1169 pci_conf[PCI_CLASS_PROG] = 0x00; in usb_uhci_common_realize()
1171 pci_conf[USB_SBRN] = USB_RELEASE_1; /* release number */ in usb_uhci_common_realize()
1172 pci_config_set_interrupt_pin(pci_conf, u->info.irq_pin + 1); in usb_uhci_common_realize()
/qemu/hw/isa/
H A Dpiix.c140 pci_conf[0x05] = 0x00; in piix_reset()
141 pci_conf[0x06] = 0x00; in piix_reset()
143 pci_conf[0x4c] = 0x4d; in piix_reset()
144 pci_conf[0x4e] = 0x03; in piix_reset()
145 pci_conf[0x4f] = 0x00; in piix_reset()
146 pci_conf[0x60] = 0x80; in piix_reset()
147 pci_conf[0x61] = 0x80; in piix_reset()
148 pci_conf[0x62] = 0x80; in piix_reset()
149 pci_conf[0x63] = 0x80; in piix_reset()
150 pci_conf[0x69] = 0x02; in piix_reset()
[all …]
H A Dvt82c686.c810 uint8_t *pci_conf = s->dev.config; in vt82c686b_isa_reset() local
817 pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ in vt82c686b_isa_reset()
818 pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ in vt82c686b_isa_reset()
821 pci_conf[0x59] = 0x04; in vt82c686b_isa_reset()
822 pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ in vt82c686b_isa_reset()
823 pci_conf[0x5f] = 0x04; in vt82c686b_isa_reset()
824 pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ in vt82c686b_isa_reset()
879 uint8_t *pci_conf = s->dev.config; in vt8231_isa_reset() local
886 pci_conf[0x4c] = 0x04; /* IDE interrupt Routing */ in vt8231_isa_reset()
888 pci_conf[0x67] = 0x08; /* Fast IR Config */ in vt8231_isa_reset()
[all …]
H A Di82378.c67 uint8_t *pci_conf; in i82378_realize() local
72 pci_conf = pci->config; in i82378_realize()
73 pci_set_word(pci_conf + PCI_COMMAND, in i82378_realize()
75 pci_set_word(pci_conf + PCI_STATUS, in i82378_realize()
78 pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */ in i82378_realize()
H A Dlpc_ich9.c621 uint8_t *pci_conf; in ich9_lpc_machine_ready() local
623 pci_conf = s->d.config; in ich9_lpc_machine_ready()
626 pci_conf[0x82] |= 0x01; in ich9_lpc_machine_ready()
630 pci_conf[0x82] |= 0x02; in ich9_lpc_machine_ready()
634 pci_conf[0x82] |= 0x04; in ich9_lpc_machine_ready()
638 pci_conf[0x82] |= 0x08; in ich9_lpc_machine_ready()
/qemu/hw/i386/xen/
H A Dxen_pvdevice.c89 uint8_t *pci_conf; in xen_pv_realize() local
97 pci_conf = pci_dev->config; in xen_pv_realize()
99 pci_set_word(pci_conf + PCI_VENDOR_ID, d->vendor_id); in xen_pv_realize()
100 pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, d->vendor_id); in xen_pv_realize()
101 pci_set_word(pci_conf + PCI_DEVICE_ID, d->device_id); in xen_pv_realize()
102 pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, d->device_id); in xen_pv_realize()
103 pci_set_byte(pci_conf + PCI_REVISION_ID, d->revision); in xen_pv_realize()
105 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_MEMORY); in xen_pv_realize()
107 pci_config_set_prog_interface(pci_conf, 0); in xen_pv_realize()
109 pci_conf[PCI_INTERRUPT_PIN] = 1; in xen_pv_realize()
H A Dxen_platform.c550 uint8_t *pci_conf; in xen_platform_realize() local
558 pci_conf = dev->config; in xen_platform_realize()
560 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); in xen_platform_realize()
562 pci_config_set_prog_interface(pci_conf, 0); in xen_platform_realize()
564 pci_conf[PCI_INTERRUPT_PIN] = 1; in xen_platform_realize()
/qemu/hw/ide/
H A Dvia.c126 uint8_t *pci_conf = pd->config; in via_ide_reset() local
143 pci_set_long(pci_conf + 0x40, 0x0a090600); in via_ide_reset()
145 pci_set_long(pci_conf + 0x44, 0x00c00068); in via_ide_reset()
147 pci_set_long(pci_conf + 0x48, 0xa8a8a8a8); in via_ide_reset()
149 pci_set_long(pci_conf + 0x4c, 0x000000ff); in via_ide_reset()
151 pci_set_long(pci_conf + 0x50, 0x07070707); in via_ide_reset()
153 pci_set_long(pci_conf + 0x54, 0x00000004); in via_ide_reset()
155 pci_set_long(pci_conf + 0x60, 0x00000200); in via_ide_reset()
157 pci_set_long(pci_conf + 0x68, 0x00000200); in via_ide_reset()
159 pci_set_long(pci_conf + 0xc0, 0x00020001); in via_ide_reset()
[all …]
H A Dpiix.c110 uint8_t *pci_conf = pd->config; in piix_ide_reset() local
118 pci_set_word(pci_conf + PCI_COMMAND, 0x0000); in piix_ide_reset()
119 pci_set_word(pci_conf + PCI_STATUS, in piix_ide_reset()
121 pci_set_long(pci_conf + 0x20, 0x1); /* BMIBA: 20-23h */ in piix_ide_reset()
155 uint8_t *pci_conf = dev->config; in pci_piix_ide_realize() local
157 pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode in pci_piix_ide_realize()
H A Dcmd646.c254 uint8_t *pci_conf = dev->config; in pci_cmd646_ide_realize() local
257 pci_conf[PCI_CLASS_PROG] = 0x8f; in pci_cmd646_ide_realize()
259 pci_conf[CNTRL] = CNTRL_EN_CH0; // enable IDE0 in pci_cmd646_ide_realize()
262 pci_conf[CNTRL] |= CNTRL_EN_CH1; /* enable IDE1 */ in pci_cmd646_ide_realize()
293 pci_conf[PCI_INTERRUPT_PIN] = 0x01; // interrupt on pin 1 in pci_cmd646_ide_realize()
/qemu/hw/acpi/
H A Dpiix4.c285 pci_conf[0x58] = 0; in piix4_pm_reset()
286 pci_conf[0x59] = 0; in piix4_pm_reset()
287 pci_conf[0x5a] = 0; in piix4_pm_reset()
288 pci_conf[0x5b] = 0; in piix4_pm_reset()
291 pci_conf[0x80] = 0; in piix4_pm_reset()
417 uint8_t *pci_conf; in piix4_pm_machine_ready() local
419 pci_conf = d->config; in piix4_pm_machine_ready()
422 pci_conf[0x63] = 0x60; in piix4_pm_machine_ready()
452 uint8_t *pci_conf; in piix4_pm_realize() local
455 pci_conf[0x06] = 0x80; in piix4_pm_realize()
[all …]
/qemu/hw/net/
H A Dpcnet-pci.c201 uint8_t *pci_conf; in pci_pcnet_realize() local
208 pci_conf = pci_dev->config; in pci_pcnet_realize()
210 pci_set_word(pci_conf + PCI_STATUS, in pci_pcnet_realize()
213 pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, 0x0); in pci_pcnet_realize()
214 pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, 0x0); in pci_pcnet_realize()
216 pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ in pci_pcnet_realize()
217 pci_conf[PCI_MIN_GNT] = 0x06; in pci_pcnet_realize()
218 pci_conf[PCI_MAX_LAT] = 0xff; in pci_pcnet_realize()
H A Dne2000-pci.c59 uint8_t *pci_conf; in pci_ne2000_realize() local
61 pci_conf = d->dev.config; in pci_ne2000_realize()
62 pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ in pci_ne2000_realize()
H A Dsungem.c1350 uint8_t *pci_conf; in sungem_realize() local
1352 pci_conf = pci_dev->config; in sungem_realize()
1354 pci_set_word(pci_conf + PCI_STATUS, in sungem_realize()
1359 pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, 0x0); in sungem_realize()
1360 pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, 0x0); in sungem_realize()
1362 pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ in sungem_realize()
1363 pci_conf[PCI_MIN_GNT] = 0x40; in sungem_realize()
1364 pci_conf[PCI_MAX_LAT] = 0x40; in sungem_realize()
H A Deepro100.c481 uint8_t *pci_conf = s->dev.config; in e100_pci_reset() local
486 pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | in e100_pci_reset()
489 pci_set_byte(pci_conf + PCI_LATENCY_TIMER, 0x20); /* latency timer = 32 clocks */ in e100_pci_reset()
493 pci_set_byte(pci_conf + PCI_INTERRUPT_PIN, 1); /* interrupt pin A */ in e100_pci_reset()
495 pci_set_byte(pci_conf + PCI_MIN_GNT, 0x08); in e100_pci_reset()
497 pci_set_byte(pci_conf + PCI_MAX_LAT, 0x18); in e100_pci_reset()
559 pci_set_word(pci_conf + cfg_offset + PCI_PM_PMC, 0x7e21); in e100_pci_reset()
562 pci_set_word(pci_conf + cfg_offset + PCI_PM_CTRL, 0x0000); in e100_pci_reset()
564 pci_set_byte(pci_conf + cfg_offset + PCI_PM_PPB_EXTENSIONS, 0x0000); in e100_pci_reset()
/qemu/hw/net/can/
H A Dcan_mioe3680_pci.c160 uint8_t *pci_conf; in mioe3680_pci_realize() local
163 pci_conf = pci_dev->config; in mioe3680_pci_realize()
164 pci_conf[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ in mioe3680_pci_realize()
H A Dcan_pcm3680_pci.c160 uint8_t *pci_conf; in pcm3680i_pci_realize() local
163 pci_conf = pci_dev->config; in pcm3680i_pci_realize()
164 pci_conf[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ in pcm3680i_pci_realize()
H A Dctucan_pci.c170 uint8_t *pci_conf; in ctucan_pci_realize() local
173 pci_conf = pci_dev->config; in ctucan_pci_realize()
174 pci_conf[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ in ctucan_pci_realize()
H A Dcan_kvaser_pci.c226 uint8_t *pci_conf; in kvaser_pci_realize() local
228 pci_conf = pci_dev->config; in kvaser_pci_realize()
229 pci_conf[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ in kvaser_pci_realize()
/qemu/hw/misc/
H A Dpci-testdev.c245 uint8_t *pci_conf; in pci_testdev_realize() local
249 pci_conf = pci_dev->config; in pci_testdev_realize()
251 pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */ in pci_testdev_realize()
H A Dedu.c373 uint8_t *pci_conf = pdev->config; in pci_edu_realize() local
375 pci_config_set_interrupt_pin(pci_conf, 1); in pci_edu_realize()
/qemu/hw/remote/
H A Dproxy.c81 uint8_t *pci_conf = device->config; in pci_proxy_dev_realize() local
118 pci_conf[PCI_LATENCY_TIMER] = 0xff; in pci_proxy_dev_realize()
119 pci_conf[PCI_INTERRUPT_PIN] = 0x01; in pci_proxy_dev_realize()
/qemu/hw/scsi/
H A Desp-pci.c391 uint8_t *pci_conf; in esp_pci_scsi_realize() local
397 pci_conf = dev->config; in esp_pci_scsi_realize()
400 pci_conf[PCI_INTERRUPT_PIN] = 0x01; in esp_pci_scsi_realize()

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