| /qemu/hw/ssi/ |
| H A D | npcm7xx_fiu.c | 173 ssi_transfer(fiu->spi, extract32(addr, 8, 8)); in npcm7xx_fiu_flash_read()
174 ssi_transfer(fiu->spi, extract32(addr, 0, 8)); in npcm7xx_fiu_flash_read()
187 ssi_transfer(fiu->spi, 0); in npcm7xx_fiu_flash_read()
232 ssi_transfer(fiu->spi, extract32(addr, 8, 8)); in npcm7xx_fiu_flash_write()
287 ssi_transfer(spi, extract32(addr, 24, 8)); in send_address()
290 ssi_transfer(spi, extract32(addr, 16, 8)); in send_address()
293 ssi_transfer(spi, extract32(addr, 8, 8)); in send_address()
296 ssi_transfer(spi, extract32(addr, 0, 8)); in send_address()
340 send_address(s->spi, FIU_UMA_CFG_ADDSIZ(uma_cfg), in npcm7xx_fiu_uma_transaction()
361 c = ssi_transfer(s->spi, 0); in npcm7xx_fiu_uma_transaction()
[all …]
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| H A D | npcm_pspi.c | 80 value = ssi_transfer(s->spi, extract16(data, 8, 8)) << 8; in npcm_pspi_write_data()
82 value |= ssi_transfer(s->spi, extract16(data, 0, 8)); in npcm_pspi_write_data()
184 s->spi = ssi_create_bus(dev, "pspi"); in npcm_pspi_realize()
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| H A D | xilinx_spi.c | 94 SSIBus *spi; member
182 rx = ssi_transfer(s->spi, tx); in spi_flush_txfifo()
334 s->spi = ssi_create_bus(dev, "spi"); in xilinx_spi_realize()
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| H A D | aspeed_smc.c | 462 ssi_transfer(s->spi, cmd); in aspeed_smc_flash_setup()
465 ssi_transfer(s->spi, (addr >> (i * 8)) & 0xff); in aspeed_smc_flash_setup()
477 ssi_transfer(fl->controller->spi, s->regs[R_DUMMY_DATA] & 0xff); in aspeed_smc_flash_setup()
492 ret |= (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); in aspeed_smc_flash_read()
501 ret |= (uint64_t) ssi_transfer(s->spi, 0x0) << (8 * i); in aspeed_smc_flash_read()
592 ssi_transfer(s->spi, s->regs[R_DUMMY_DATA] & 0xff); in aspeed_smc_do_snoop()
635 ssi_transfer(s->spi, (data >> (8 * i)) & 0xff); in aspeed_smc_flash_write()
643 ssi_transfer(s->spi, (data >> (8 * i)) & 0xff); in aspeed_smc_flash_write()
697 DeviceState *dev = ssi_get_cs(s->spi, i); in aspeed_smc_reset()
703 BUS(s->spi)->name, i, object_get_typename(o)); in aspeed_smc_reset()
[all …]
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| /qemu/hw/intc/ |
| H A D | arm_gicv2m.c | 56 qemu_irq spi[GICV2M_NUM_SPI_MAX]; member
66 qemu_irq_pulse(s->spi[irq]); in gicv2m_set_irq()
115 int spi; in gicv2m_write() local
117 spi = (value & 0x3ff) - (s->base_spi + 32); in gicv2m_write()
118 if (spi >= 0 && spi < s->num_spi) { in gicv2m_write()
119 gicv2m_set_irq(s, spi); in gicv2m_write()
155 sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->spi[i]); in gicv2m_realize()
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| /qemu/hw/arm/ |
| H A D | msf2-soc.c | 73 object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_MSS_SPI); in m2sxxx_soc_initfn()
185 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in m2sxxx_soc_realize()
189 sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]); in m2sxxx_soc_realize()
190 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, in m2sxxx_soc_realize()
196 OBJECT(&s->spi[i]), "spi"); in m2sxxx_soc_realize()
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| H A D | mps2-tz.c | 148 PL022State spi[5]; member
702 PL022State *spi = opaque; in make_spi() local
705 object_initialize_child(OBJECT(mms), name, spi, TYPE_PL022); in make_spi()
706 sysbus_realize(SYS_BUS_DEVICE(spi), &error_fatal); in make_spi()
707 s = SYS_BUS_DEVICE(spi); in make_spi()
944 { "spi0", make_spi, &mms->spi[0], 0x40205000, 0x1000, { 51 } }, in mps2tz_common_init()
945 { "spi1", make_spi, &mms->spi[1], 0x40206000, 0x1000, { 52 } }, in mps2tz_common_init()
946 { "spi2", make_spi, &mms->spi[2], 0x40209000, 0x1000, { 53 } }, in mps2tz_common_init()
947 { "spi3", make_spi, &mms->spi[3], 0x4020a000, 0x1000, { 54 } }, in mps2tz_common_init()
948 { "spi4", make_spi, &mms->spi[4], 0x4020b000, 0x1000, { 55 } }, in mps2tz_common_init()
[all …]
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| H A D | stm32f100_soc.c | 59 object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_STM32F2XX_SPI); in stm32f100_soc_initfn()
143 dev = DEVICE(&(s->spi[i])); in stm32f100_soc_realize()
144 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in stm32f100_soc_realize()
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| H A D | aspeed_ast10x0.c | 150 object_initialize_child(obj, "spi[*]", &s->spi[i], typename); in aspeed_soc_ast1030_init()
351 object_property_set_link(OBJECT(&s->spi[i]), "dram", in aspeed_soc_ast1030_realize()
353 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in aspeed_soc_ast1030_realize()
356 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0, in aspeed_soc_ast1030_realize()
358 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1, in aspeed_soc_ast1030_realize()
359 ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base); in aspeed_soc_ast1030_realize()
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| H A D | stm32f205_soc.c | 76 object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_STM32F2XX_SPI); in stm32f205_soc_initfn()
195 dev = DEVICE(&(s->spi[i])); in stm32f205_soc_realize()
196 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in stm32f205_soc_realize()
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| H A D | mps3r.c | 113 PL022State spi[3]; member
504 for (int i = 0; i < ARRAY_SIZE(mms->spi); i++) { in mps3r_common_init()
508 object_initialize_child(OBJECT(mms), s, &mms->spi[i], TYPE_PL022); in mps3r_common_init()
509 sysbus_realize(SYS_BUS_DEVICE(&mms->spi[i]), &error_fatal); in mps3r_common_init()
510 sysbus_mmio_map(SYS_BUS_DEVICE(&mms->spi[i]), 0, baseaddr); in mps3r_common_init()
511 sysbus_connect_irq(SYS_BUS_DEVICE(&mms->spi[i]), 0, in mps3r_common_init()
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| H A D | stm32f405_soc.c | 79 object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_STM32F2XX_SPI); in stm32f405_soc_initfn()
223 dev = DEVICE(&(s->spi[i])); in stm32f405_soc_realize()
224 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in stm32f405_soc_realize()
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| H A D | aspeed_ast2400.c | 194 object_initialize_child(obj, "spi[*]", &s->spi[i], typename); in aspeed_ast2400_soc_init()
376 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in aspeed_ast2400_soc_realize()
379 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0, in aspeed_ast2400_soc_realize()
381 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1, in aspeed_ast2400_soc_realize()
382 ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base); in aspeed_ast2400_soc_realize()
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| H A D | aspeed_ast2600.c | 201 object_initialize_child(obj, "spi[*]", &s->spi[i], typename); in aspeed_soc_ast2600_init()
462 object_property_set_link(OBJECT(&s->spi[i]), "dram", in aspeed_soc_ast2600_realize()
464 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in aspeed_soc_ast2600_realize()
467 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0, in aspeed_soc_ast2600_realize()
469 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1, in aspeed_soc_ast2600_realize()
470 ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base); in aspeed_soc_ast2600_realize()
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| H A D | fby35.c | 137 aspeed_board_init_flashes(&soc->spi[0], "sst25vf032b", 2, 4); in fby35_bic_init()
138 aspeed_board_init_flashes(&soc->spi[1], "sst25vf032b", 2, 6); in fby35_bic_init()
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| H A D | fsl-imx6.c | 98 object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI); in fsl_imx6_init()
379 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { in fsl_imx6_realize()
383 sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr); in fsl_imx6_realize()
384 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, in fsl_imx6_realize()
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| /qemu/hw/microblaze/ |
| H A D | petalogix_ml605_mmu.c | 173 SSIBus *spi; in petalogix_ml605_init() local
182 spi = (SSIBus *)qdev_get_child_bus(dev, "spi"); in petalogix_ml605_init()
195 qdev_realize_and_unref(dev, BUS(spi), &error_fatal); in petalogix_ml605_init()
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| /qemu/hw/sd/ |
| H A D | pxa2xx_mmci.c | 46 uint32_t spi; member
90 VMSTATE_UINT32(spi, PXA2xxMMCIState),
295 ret = s->spi; in pxa2xx_mmci_read()
388 s->spi = value & 0xf; in pxa2xx_mmci_write()
522 s->spi = 0; in pxa2xx_mmci_reset()
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| /qemu/include/hw/ssi/ |
| H A D | npcm_pspi.h | 45 SSIBus *spi; member
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| H A D | mss-spi.h | 47 SSIBus *spi; member
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| H A D | sifive_spi.h | 42 SSIBus *spi; member
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| H A D | npcm7xx_fiu.h | 65 SSIBus *spi; member
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| /qemu/include/hw/arm/ |
| H A D | stm32f100_soc.h | 51 STM32F2XXSPIState spi[STM_NUM_SPIS]; member
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| H A D | msf2-soc.h | 65 MSSSpiState spi[MSF2_NUM_SPIS]; member
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| H A D | stm32f205_soc.h | 60 STM32F2XXSPIState spi[STM_NUM_SPIS]; member
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