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Searched refs:sregs (Results 1 – 25 of 28) sorted by relevance

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/qemu/target/xtensa/
H A Dexc_helper.c61 env->sregs[EPC1] = pc; in HELPER()
65 env->sregs[EXCCAUSE] = cause; in HELPER()
66 env->sregs[PS] |= PS_EXCM; in HELPER()
74 env->sregs[EXCVADDR] = vaddr; in HELPER()
92 env->sregs[EPS2 + level - 2] = env->sregs[PS]; in HELPER()
93 env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM | in HELPER()
105 env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | in HELPER()
168 env->sregs[INTSET] & env->sregs[INTENABLE])) || in handle_interrupt()
177 env->sregs[EPS2 + level - 2] = env->sregs[PS]; in handle_interrupt()
178 env->sregs[PS] = in handle_interrupt()
[all …]
H A Dwin_helper.c90 env->sregs[WINDOW_BASE] = windowbase_bound(position, env); in xtensa_rotate_window_abs()
109 env->windowbase_next = env->sregs[WINDOW_BASE] + callinc; in HELPER()
117 (env->sregs[WINDOW_BASE] + 1); in HELPER()
123 env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) | in HELPER()
125 env->sregs[EPC1] = env->pc = pc; in HELPER()
145 uint32_t windowstart = env->sregs[WINDOW_START]; in HELPER()
158 pc, env->sregs[PS], m, n); in HELPER()
167 if (!(env->sregs[WINDOW_START] & in HELPER()
173 env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) | in HELPER()
175 env->sregs[EPC1] = env->pc = pc; in HELPER()
[all …]
H A Ddbg_helper.c39 uint32_t change = v ^ env->sregs[IBREAKENABLE]; in HELPER()
45 cpu_breakpoint_insert(cs, env->sregs[IBREAKA + i], in HELPER()
58 if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) { in HELPER()
64 env->sregs[IBREAKA + i] = v; in HELPER()
76 if (env->sregs[IBREAKENABLE] & (1 << i) && in xtensa_debug_check_breakpoint()
77 env->sregs[IBREAKA + i] == env->pc) { in xtensa_debug_check_breakpoint()
118 uint32_t dbreakc = env->sregs[DBREAKC + i]; in HELPER()
121 env->sregs[DBREAKA + i] != v) { in HELPER()
124 env->sregs[DBREAKA + i] = v; in HELPER()
131 set_dbreak(env, i, env->sregs[DBREAKA + i], v); in HELPER()
[all …]
H A Dcpu.c109 env->sregs[LITBASE] &= ~1; in xtensa_cpu_reset_hold()
111 env->sregs[PS] = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
115 env->sregs[PS] = PS_UM | (3 << PS_RING_SHIFT); in xtensa_cpu_reset_hold()
119 env->sregs[PS] |= PS_WOE; in xtensa_cpu_reset_hold()
121 env->sregs[CPENABLE] = 0xff; in xtensa_cpu_reset_hold()
123 env->sregs[VECBASE] = env->config->vecbase; in xtensa_cpu_reset_hold()
124 env->sregs[IBREAKENABLE] = 0; in xtensa_cpu_reset_hold()
125 env->sregs[MEMCTL] = MEMCTL_IL0EN & env->config->memctl_mask; in xtensa_cpu_reset_hold()
126 env->sregs[ATOMCTL] = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
128 env->sregs[CONFIGID0] = env->config->configid[0]; in xtensa_cpu_reset_hold()
[all …]
H A Dcpu.h513 uint32_t sregs[256]; member
670 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; in xtensa_get_ring()
681 (env->sregs[PS] & PS_EXCM) == 0) { in xtensa_get_cring()
682 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; in xtensa_get_cring()
706 return env->sregs[WINDOW_START] | in xtensa_replicate_windowstart()
707 (env->sregs[WINDOW_START] << env->config->nareg / 4); in xtensa_replicate_windowstart()
741 if (env->sregs[PS] & PS_EXCM) { in cpu_get_tb_cpu_state()
762 target_ulong lbeg_off = env->sregs[LEND] - env->sregs[LBEG]; in cpu_get_tb_cpu_state()
771 (env->sregs[LITBASE] & 1)) { in cpu_get_tb_cpu_state()
786 (env->sregs[PS] & (PS_WOE | PS_EXCM)) == PS_WOE) { in cpu_get_tb_cpu_state()
[all …]
H A Dop_helper.c45 env->sregs[CCOUNT] = env->ccount_base + in HELPER()
54 env->ccount_base += v - env->sregs[CCOUNT]; in HELPER()
65 qatomic_and(&env->sregs[INTSET], in HELPER()
68 dcc = (uint64_t)(env->sregs[CCOMPARE + i] - env->sregs[CCOUNT] - 1) + 1; in HELPER()
83 uint32_t atomctl = env->sregs[ATOMCTL]; in HELPER()
137 uint32_t atomctl = env->sregs[ATOMCTL]; in HELPER()
196 env->sregs[MEMCTL] = v & env->config->memctl_mask; in HELPER()
H A Dmmu_helper.c76 if (v != env->sregs[RASID]) { in HELPER()
77 env->sregs[RASID] = v; in HELPER()
412 env->sregs[RASID] = 0x04030201; in reset_mmu()
413 env->sregs[ITLBCFG] = 0; in reset_mmu()
414 env->sregs[DTLBCFG] = 0; in reset_mmu()
423 env->sregs[MPUENB] = 0; in reset_mmu()
425 env->sregs[CACHEADRDIS] = 0; in reset_mmu()
827 env->sregs[EXCVADDR] = vaddr; in get_physical_addr_mmu()
950 if (v != env->sregs[MPUENB]) { in HELPER()
951 env->sregs[MPUENB] = v; in HELPER()
[all …]
H A Dgdbstub.c91 return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]); in xtensa_cpu_gdb_read_register()
148 env->sregs[reg->targno & 0xff] = tmp; in xtensa_cpu_gdb_write_register()
H A Dhelper.c238 if (env->sregs[ICOUNT] == 0xffffffff && in xtensa_breakpoint_handler()
239 xtensa_get_cintlevel(env) < env->sregs[ICOUNTLEVEL]) { in xtensa_breakpoint_handler()
/qemu/linux-user/xtensa/
H A Dsignal.c67 uint32_t wb = env->sregs[WINDOW_BASE]; in flush_window_regs()
105 g_assert(env->sregs[WINDOW_BASE] == wb); in flush_window_regs()
116 __put_user(env->sregs[PS], &sc->sc_ps); in setup_sigcontext()
117 __put_user(env->sregs[LBEG], &sc->sc_lbeg); in setup_sigcontext()
118 __put_user(env->sregs[LEND], &sc->sc_lend); in setup_sigcontext()
218 env->sregs[WINDOW_BASE] = 0; in setup_rt_frame()
219 env->sregs[WINDOW_START] = 1; in setup_rt_frame()
221 abi_call0 = (env->sregs[PS] & PS_WOE) == 0; in setup_rt_frame()
260 env->sregs[WINDOW_BASE] = 0; in restore_sigcontext()
261 env->sregs[WINDOW_START] = 1; in restore_sigcontext()
[all …]
H A Dcpu_loop.c29 env->pc = env->sregs[EPC1]; in xtensa_rfw()
34 env->sregs[WINDOW_START] |= (1 << env->sregs[WINDOW_BASE]); in xtensa_rfwu()
40 env->sregs[WINDOW_START] &= ~(1 << env->sregs[WINDOW_BASE]); in xtensa_rfwo()
138 env->sregs[PS] &= ~PS_EXCM; in cpu_loop()
163 switch (env->sregs[EXCCAUSE]) { in cpu_loop()
166 env->sregs[EPC1]); in cpu_loop()
170 env->sregs[EPC1]); in cpu_loop()
194 env->sregs[PS] = deposit32(env->sregs[PS], in cpu_loop()
220 env->sregs[EPC1]); in cpu_loop()
230 env->sregs[EPC1]); in cpu_loop()
[all …]
H A Dtarget_cpu.h13 env->sregs[WINDOW_BASE] = 0; in cpu_clone_regs_child()
14 env->sregs[WINDOW_START] = 0x1; in cpu_clone_regs_child()
/qemu/target/ppc/
H A Dkvm.c185 struct kvm_sregs sregs; in kvm_arch_sync_sregs() local
209 sregs.pvr = cenv->spr[SPR_PVR]; in kvm_arch_sync_sregs()
864 struct kvm_sregs sregs = { }; in kvmppc_put_books_sregs() local
867 sregs.pvr = env->spr[SPR_PVR]; in kvmppc_put_books_sregs()
872 sregs.u.s.sdr1 = env->spr[SPR_SDR1]; in kvmppc_put_books_sregs()
888 sregs.u.s.ppc32.sr[i] = env->sr[i]; in kvmppc_put_books_sregs()
1025 struct kvm_sregs sregs; in kvmppc_get_booke_sregs() local
1041 env->spr[SPR_DECR] = sregs.u.e.dec; in kvmppc_get_booke_sregs()
1158 struct kvm_sregs sregs; in kvmppc_get_books_sregs() local
1168 ppc_store_sdr1(env, sregs.u.s.sdr1); in kvmppc_get_books_sregs()
[all …]
/qemu/hw/xtensa/
H A Dpic_cpu.c39 uint32_t int_set_enabled = env->sregs[INTSET] & in check_interrupts()
40 (env->sregs[INTENABLE] | env->config->inttype_mask[INTTYPE_NMI]); in check_interrupts()
56 env->pc, env->regs[0], env->sregs[PS], in check_interrupts()
57 env->sregs[INTSET], env->sregs[INTENABLE], in check_interrupts()
58 env->sregs[CCOUNT]); in check_interrupts()
76 qatomic_or(&env->sregs[INTSET], irq_bit); in xtensa_set_irq()
78 qatomic_and(&env->sregs[INTSET], ~irq_bit); in xtensa_set_irq()
108 env->ccount_base = env->sregs[CCOUNT]; in xtensa_irq_init()
H A Dsim.c65 env->sregs[PRID] = n; in xtensa_sim_common_init()
H A Dxtfpga.c264 cenv->sregs[PRID] = n; in xtfpga_init()
/qemu/linux-user/s390x/
H A Dsignal.c61 abi_ulong sregs; member
67 target_sigregs sregs; member
134 __put_user(psw_mask, &sregs->regs.psw.mask); in save_sigregs()
135 __put_user(env->psw.addr, &sregs->regs.psw.addr); in save_sigregs()
138 __put_user(env->regs[i], &sregs->regs.gprs[i]); in save_sigregs()
141 __put_user(env->aregs[i], &sregs->regs.acrs[i]); in save_sigregs()
148 __put_user(env->fpc, &sregs->fpregs.fpc); in save_sigregs()
150 __put_user(*get_freg(env, i), &sregs->fpregs.fprs[i]); in save_sigregs()
193 __put_user(frame_addr + offsetof(sigframe, sregs), &frame->sc.sregs); in setup_frame()
196 save_sigregs(env, &frame->sregs); in setup_frame()
[all …]
/qemu/target/cris/
H A Dmmu.c81 base = env->sregs[SFR_RW_MM_KBASE_LO]; in cris_mmu_translate_seg()
83 base = env->sregs[SFR_RW_MM_KBASE_HI]; in cris_mmu_translate_seg()
151 r_cause = env->sregs[SFR_R_MM_CAUSE]; in cris_mmu_translate_page()
152 r_cfg = env->sregs[SFR_RW_MM_CFG]; in cris_mmu_translate_page()
264 env->sregs[SFR_RW_MM_TLB_SEL] = 0; in cris_mmu_translate_page()
265 set_field(&env->sregs[SFR_RW_MM_TLB_SEL], idx, 0, 4); in cris_mmu_translate_page()
266 set_field(&env->sregs[SFR_RW_MM_TLB_SEL], set, 4, 2); in cris_mmu_translate_page()
272 env->sregs[SFR_R_MM_CAUSE] = r_cause; in cris_mmu_translate_page()
283 env->sregs[SFR_RW_MM_TLB_SEL], in cris_mmu_translate_page()
335 if (!cris_mmu_enabled(env->sregs[SFR_RW_GC_CFG])) { in cris_mmu_translate()
[all …]
H A Dmachine.c59 VMSTATE_UINT32_ARRAY(sregs[0], CPUCRISState, 16),
60 VMSTATE_UINT32_ARRAY(sregs[1], CPUCRISState, 16),
61 VMSTATE_UINT32_ARRAY(sregs[2], CPUCRISState, 16),
62 VMSTATE_UINT32_ARRAY(sregs[3], CPUCRISState, 16),
H A Dop_helper.c76 env->sregs[srs][sreg] = env->regs[reg]; in helper_movl_sreg_reg()
82 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg]; in helper_movl_sreg_reg()
83 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg]; in helper_movl_sreg_reg()
91 idx = set = env->sregs[SFR_RW_MM_TLB_SEL]; in helper_movl_sreg_reg()
97 lo = env->sregs[SFR_RW_MM_TLB_LO]; in helper_movl_sreg_reg()
99 hi = env->sregs[SFR_R_MM_CAUSE]; in helper_movl_sreg_reg()
129 idx = set = env->sregs[SFR_RW_MM_TLB_SEL]; in helper_movl_reg_sreg()
137 env->sregs[SFR_RW_MM_TLB_HI] = hi; in helper_movl_reg_sreg()
138 env->sregs[SFR_RW_MM_TLB_LO] = lo; in helper_movl_reg_sreg()
141 env->regs[reg] = env->sregs[srs][sreg]; in helper_movl_reg_sreg()
H A Dgdbstub.c69 return gdb_get_reg32(mem_buf, env->sregs[srs][n - 33]); in cris_cpu_gdb_read_register()
H A Dcpu.h148 uint32_t sregs[4][16]; member
/qemu/target/i386/kvm/
H A Dkvm.c3370 struct kvm_sregs sregs; in kvm_put_sregs() local
3376 memset(sregs.interrupt_bitmap, 0, sizeof(sregs.interrupt_bitmap)); in kvm_put_sregs()
3399 memset(sregs.idt.padding, 0, sizeof sregs.idt.padding); in kvm_put_sregs()
3402 memset(sregs.gdt.padding, 0, sizeof sregs.gdt.padding); in kvm_put_sregs()
3404 sregs.cr0 = env->cr[0]; in kvm_put_sregs()
3405 sregs.cr2 = env->cr[2]; in kvm_put_sregs()
3406 sregs.cr3 = env->cr[3]; in kvm_put_sregs()
3407 sregs.cr4 = env->cr[4]; in kvm_put_sregs()
3423 sregs.flags = 0; in kvm_put_sregs2()
3446 memset(sregs.idt.padding, 0, sizeof sregs.idt.padding); in kvm_put_sregs2()
[all …]
/qemu/linux-user/
H A Delfload.c1983 (*regs)[TARGET_REG_PS] = tswapreg(env->sregs[PS] & ~PS_EXCM); in elf_core_copy_regs()
1984 (*regs)[TARGET_REG_LBEG] = tswapreg(env->sregs[LBEG]); in elf_core_copy_regs()
1985 (*regs)[TARGET_REG_LEND] = tswapreg(env->sregs[LEND]); in elf_core_copy_regs()
1986 (*regs)[TARGET_REG_LCOUNT] = tswapreg(env->sregs[LCOUNT]); in elf_core_copy_regs()
1987 (*regs)[TARGET_REG_SAR] = tswapreg(env->sregs[SAR]); in elf_core_copy_regs()
1988 (*regs)[TARGET_REG_WINDOWSTART] = tswapreg(env->sregs[WINDOW_START]); in elf_core_copy_regs()
1989 (*regs)[TARGET_REG_WINDOWBASE] = tswapreg(env->sregs[WINDOW_BASE]); in elf_core_copy_regs()
/qemu/linux-headers/asm-x86/
H A Dkvm.h428 struct kvm_sregs sregs; member

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