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Searched refs:tcg_gen_shli_i32 (Results 1 – 21 of 21) sorted by relevance

/qemu/tcg/
H A Dtcg-op.c837 tcg_gen_shli_i32(t0, arg1, arg2); in tcg_gen_rotli_i32()
898 tcg_gen_shli_i32(t1, arg1, len); in tcg_gen_deposit_i32()
912 tcg_gen_shli_i32(t1, t1, ofs); in tcg_gen_deposit_i32()
914 tcg_gen_shli_i32(t1, arg2, ofs); in tcg_gen_deposit_i32()
931 tcg_gen_shli_i32(ret, arg, ofs); in tcg_gen_deposit_z_i32()
945 tcg_gen_shli_i32(ret, ret, ofs); in tcg_gen_deposit_z_i32()
952 tcg_gen_shli_i32(ret, ret, ofs); in tcg_gen_deposit_z_i32()
975 tcg_gen_shli_i32(ret, ret, ofs); in tcg_gen_deposit_z_i32()
1100 tcg_gen_shli_i32(ret, arg, 32 - len - ofs); in tcg_gen_sextract_i32()
1270 tcg_gen_shli_i32(ret, arg, 24); in tcg_gen_ext8s_i32()
[all …]
H A Dtcg-op-gvec.c2827 tcg_gen_shli_i32(d, a, c); in tcg_gen_vec_shl8i_i32()
2834 tcg_gen_shli_i32(d, a, c); in tcg_gen_vec_shl16i_i32()
2853 { .fni4 = tcg_gen_shli_i32, in tcg_gen_gvec_shli()
3229 tcg_gen_shli_i32(desc, shift, SIMD_DATA_SHIFT); in do_gvec_shifts()
/qemu/target/sh4/
H A Dtranslate.c190 tcg_gen_shli_i32(t0, cpu_sr_q, SR_Q); in gen_read_sr()
192 tcg_gen_shli_i32(t0, cpu_sr_m, SR_M); in gen_read_sr()
194 tcg_gen_shli_i32(t0, cpu_sr_t, SR_T); in gen_read_sr()
686 tcg_gen_shli_i32(high, REG(B7_4), 16); in _decode_opc()
767 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1598 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1605 tcg_gen_shli_i32(tmp, cpu_sr_t, 31); in _decode_opc()
1622 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1633 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 2); in _decode_opc()
1636 tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 8); in _decode_opc()
[all …]
/qemu/target/arm/tcg/
H A Dtranslate-m-nocp.c482 tcg_gen_shli_i32(sfpa, sfpa, 31 - R_V7M_CONTROL_SFPA_SHIFT); in gen_M_fp_sysreg_read()
535 tcg_gen_shli_i32(sfpa, sfpa, 31 - R_V7M_CONTROL_SFPA_SHIFT); in gen_M_fp_sysreg_read()
H A Dtranslate.c426 tcg_gen_shli_i32(var, var, 8); in gen_rev16()
574 tcg_gen_shli_i32(var, var, shift); in gen_arm_shift_im()
605 tcg_gen_shli_i32(tmp, cpu_CF, 31); in gen_arm_shift_im()
1887 tcg_gen_shli_i32(tmp, tmp, 28); in disas_iwmmxt_insn()
1919 tcg_gen_shli_i32(tmp2, tmp2, 4); in disas_iwmmxt_insn()
1925 tcg_gen_shli_i32(tmp2, tmp2, 8); in disas_iwmmxt_insn()
1930 tcg_gen_shli_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
1976 tcg_gen_shli_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
4451 tcg_gen_shli_i32(t1, t1, 16); in op_smlawx()
5824 tcg_gen_shli_i32(tm, tm, shift); in DO_PAR_ADDSUB_GE()
[all …]
H A Dtranslate-neon.c2080 tcg_gen_shli_i32(tmp, var, 16); in gen_neon_dup_low16()
3113 tcg_gen_shli_i32(tmp2, tmp2, 16); in trans_VCVT_F16_F32()
3121 tcg_gen_shli_i32(tmp3, tmp3, 16); in trans_VCVT_F16_F32()
3590 tcg_gen_shli_i32(rd, t0, 8); in gen_neon_trn_u8()
3609 tcg_gen_shli_i32(rd, t0, 16); in gen_neon_trn_u16()
H A Dtranslate-a64.c2209 tcg_gen_shli_i32(cpu_VF, cpu_VF, 3); in gen_set_nzcv()
6477 tcg_gen_shli_i32(cpu_NF, nzcv, 31 - 3); in disas_rotate_right_into_flags()
6487 tcg_gen_shli_i32(cpu_VF, nzcv, 31 - 0); in disas_rotate_right_into_flags()
6517 tcg_gen_shli_i32(cpu_NF, tmp, shift); in disas_evaluate_into_flags()
6518 tcg_gen_shli_i32(cpu_VF, tmp, shift - 1); in disas_evaluate_into_flags()
H A Dtranslate-sve.c3147 tcg_gen_shli_i32(t2, t2, a->esz); in trans_WHILE()
/qemu/target/m68k/
H A Dtranslate.c402 tcg_gen_shli_i32(tmp, add, scale); in gen_addr_index()
1006 tcg_gen_shli_i32(tmp, tmp, 16); in gen_store_fp()
2637 tcg_gen_shli_i32(src1, reg, 16); in DISAS_INSN()
3350 tcg_gen_shli_i32(QREG_CC_N, reg, count); in shift_im()
3518 tcg_gen_shli_i32(QREG_CC_N, src, 1); in DISAS_INSN()
3673 tcg_gen_shli_i32(lo, QREG_CC_X, 31); in rotate32_x()
3703 tcg_gen_shli_i32(hi, hi, 1); in rotate32_x()
4017 tcg_gen_shli_i32(QREG_CC_N, src, ofs); in DISAS_INSN()
4157 tcg_gen_shli_i32(QREG_CC_N, src, 32 - len); in DISAS_INSN()
5199 tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A)); in gen_fcc_cond()
[all …]
/qemu/target/mips/tcg/
H A Dmxu_translate.c2213 tcg_gen_shli_i32(t0, t0, 16); in gen_mxu_D16MAX_D16MIN()
2246 tcg_gen_shli_i32(t0, t0, 16); in gen_mxu_D16MAX_D16MIN()
2247 tcg_gen_shli_i32(t1, t1, 16); in gen_mxu_D16MAX_D16MIN()
2309 tcg_gen_shli_i32(t0, t0, 8 * (3 - i)); in gen_mxu_Q8MAX_Q8MIN()
2347 tcg_gen_shli_i32(t0, t0, 8 * (3 - i)); in gen_mxu_Q8MAX_Q8MIN()
2348 tcg_gen_shli_i32(t1, t1, 8 * (3 - i)); in gen_mxu_Q8MAX_Q8MIN()
2845 tcg_gen_shli_i32(t1, t1, 16); in gen_mxu_D16CPS()
4203 tcg_gen_shli_i32(t0, t0, 8); in gen_mxu_S32ALNI()
4226 tcg_gen_shli_i32(t0, t0, 16); in gen_mxu_S32ALNI()
4249 tcg_gen_shli_i32(t0, t0, 24); in gen_mxu_S32ALNI()
H A Dtranslate.c11187 tcg_gen_shli_i32(t1, t1, MIPS_HFLAG_M16_SHIFT); in gen_branch()
/qemu/target/rx/
H A Dtranslate.c184 tcg_gen_shli_i32(mem, cpu_regs[ri], size); in rx_gen_regindex()
1289 tcg_gen_shli_i32(cpu_regs[a->rd], cpu_regs[a->rs2], a->imm); in trans_SHLL_irr()
1424 tcg_gen_shli_i32(cpu_regs[a->rd], cpu_regs[a->rd], 1); in trans_ROLC()
1439 tcg_gen_shli_i32(cpu_psw_c, cpu_psw_c, 31); in trans_RORC()
1514 tcg_gen_shli_i32(tmp, tmp, 8); in trans_REVW()
/qemu/target/ppc/
H A Dtranslate.c3819 tcg_gen_shli_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2], -sh); \
3993 tcg_gen_shli_i32(t0, t0, 3); in gen_mcrxr()
3994 tcg_gen_shli_i32(t1, t1, 2); in gen_mcrxr()
3995 tcg_gen_shli_i32(dst, dst, 1); in gen_mcrxr()
4040 tcg_gen_shli_i32(t0, t0, 4); in gen_mfcr()
4042 tcg_gen_shli_i32(t0, t0, 4); in gen_mfcr()
4044 tcg_gen_shli_i32(t0, t0, 4); in gen_mfcr()
4046 tcg_gen_shli_i32(t0, t0, 4); in gen_mfcr()
4048 tcg_gen_shli_i32(t0, t0, 4); in gen_mfcr()
4050 tcg_gen_shli_i32(t0, t0, 4); in gen_mfcr()
[all …]
/qemu/include/tcg/
H A Dtcg-op.h312 #define tcg_gen_shli_tl tcg_gen_shli_i32
H A Dtcg-op-common.h89 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
/qemu/target/xtensa/
H A Dtranslate.c1327 tcg_gen_shli_i32(tmp, arg[1].in, par[0]); in translate_addx()
2301 tcg_gen_shli_i32(arg[0].out, arg[1].in, arg[2].imm & 0x1f); in translate_slli()
2355 tcg_gen_shli_i32(tmp, arg[0].in, 3); in translate_ssa8b()
2363 tcg_gen_shli_i32(tmp, arg[0].in, 3); in translate_ssa8l()
2395 tcg_gen_shli_i32(tmp, arg[1].in, par[0]); in translate_subx()
/qemu/target/microblaze/
H A Dtranslate.c404 DO_TYPEBI_CFG(bslli, use_barrel, false, tcg_gen_shli_i32) in DO_TYPEA_CFG()
/qemu/target/ppc/translate/
H A Dspe-impl.c.inc99 GEN_SPEOP_TCG_LOGIC_IMM2(evslwi, tcg_gen_shli_i32);
H A Dfixedpoint-impl.c.inc320 tcg_gen_shli_i32(crf, crf, CRF_GT_BIT);
/qemu/target/sparc/
H A Dtranslate.c2974 tcg_gen_shli_i32(tl, tl, 3); in do_rdhtstate()
3566 tcg_gen_shli_i32(tl, tl, 3); in TRANS()
/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc3215 tcg_gen_shli_i32(ofs, ofs, s->sew);