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Searched refs:v3 (Results 1 – 25 of 48) sorted by relevance

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/qemu/tests/tcg/s390x/
H A Dvrep.c35 : [v3] "v" (v3->v) in vrep()
44 S390Vector v3 = {.d[0] = 1, .d[1] = 2}; in main() local
55 assert(vrep(&v1, &v3, 7, 0) == -1); in main()
59 assert(vrep(&v1, &v3, 7, 1) == -1); in main()
63 assert(vrep(&v1, &v3, 1, 2) == -1); in main()
67 assert(vrep(&v1, &v3, 1, 3) == -1); in main()
71 assert(vrep(&v1, &v3, 0x10, 0) == SIGILL); in main()
72 assert(vrep(&v1, &v3, 0x101, 0) == SIGILL); in main()
73 assert(vrep(&v1, &v3, 0x8, 1) == SIGILL); in main()
75 assert(vrep(&v1, &v3, 0x4, 2) == SIGILL); in main()
[all …]
H A Dvxeh2_vs.c12 static inline void vsl(S390Vector *v1, S390Vector *v2, S390Vector *v3) in vsl() argument
17 , [v3] "v" (v3->v)); in vsl()
20 static inline void vsra(S390Vector *v1, S390Vector *v2, S390Vector *v3) in vsra() argument
25 , [v3] "v" (v3->v)); in vsra()
28 static inline void vsrl(S390Vector *v1, S390Vector *v2, S390Vector *v3) in vsrl() argument
33 , [v3] "v" (v3->v)); in vsrl()
37 S390Vector *v3, const uint8_t I) in vsld() argument
42 , [v3] "v" (v3->v) in vsld()
47 S390Vector *v3, const uint8_t I) in vsrd() argument
52 , [v3] "v" (v3->v) in vsrd()
H A Dvxeh2_vstrs.c13 vstrs(S390Vector *v1, const S390Vector *v2, const S390Vector *v3, in vstrs() argument
23 , [v3] "v" (v3->v) in vstrs()
36 S390Vector v3 = {.d[0] = 0x205e410000000000ULL, .d[1] = 0}; in test_ignored_match() local
39 assert(vstrs(&v1, &v2, &v3, &v4, 0, 2) == 1); in test_ignored_match()
48 S390Vector v3 = {.d[0] = 0, .d[1] = 0}; in test_empty_needle() local
51 assert(vstrs(&v1, &v2, &v3, &v4, 0, 0) == 2); in test_empty_needle()
60 S390Vector v3 = {.d[0] = 0, .d[1] = 0}; in test_max_length() local
63 assert(vstrs(&v1, &v2, &v3, &v4, 0, 0) == 3); in test_max_length()
72 S390Vector v3 = {.d[0] = 0xfffffffeffffffffULL, in test_no_match() local
76 assert(vstrs(&v1, &v2, &v3, &v4, 0, 2) == 1); in test_no_match()
H A Dvfminmax.c22 void *v1, const void *v2, const void *v3) in vfminmax() argument
34 , [v3] "m" (*(char (*)[16])v3) in vfminmax()
297 const void *v2, const void *v3) in signed_test() argument
304 vfminmax(test->op, m4, m5, test->m6, v1, v2, v3); in signed_test()
311 dump_v(stderr, v3, n); in signed_test()
344 char v1_exp[16], v2[16], v3[16]; in main() local
362 memcpy(&v1_exp[pos], &v3[pos], float_size); in main()
367 memcpy(&v1_exp[pos], &v3[pos], float_size); in main()
379 int v3_int = *(int *)&v3[pos]; in main()
385 memcpy(&v1_exp[pos], &v3[pos], float_size); in main()
[all …]
H A Dvcksm.c18 S390Vector v3 = { in main() local
27 , [v3] "v" (v3.v)); in main()
/qemu/target/s390x/tcg/
H A Dvec_int_helper.c174 const uint64_t *q2 = v2, *q3 = v3; in HELPER()
184 const uint64_t *q2 = v2, *q3 = v3, *q4 = v4; in HELPER()
198 const uint64_t *q2 = v2, *q3 = v3; in HELPER()
208 const uint64_t *q2 = v2, *q3 = v3, *q4 = v4; in HELPER()
222 const uint64_t *q2 = v2, *q3 = v3; in HELPER()
232 const uint64_t *q2 = v2, *q3 = v3, *q4 = v4; in HELPER()
242 const uint64_t *q2 = v2, *q3 = v3; in HELPER()
254 const uint64_t *q2 = v2, *q3 = v3, *q4 = v4; in HELPER()
533 sh = s390_vec_read_element8(v3, i) & 7; in HELPER()
556 sh = s390_vec_read_element8(v3, i) & 7; in HELPER()
[all …]
H A Dvec_string_helper.c78 static int vfae(void *v1, const void *v2, const void *v3, bool in, in vfae() argument
90 b0 = s390_vec_read_element64(v3, 0); in vfae()
91 b1 = s390_vec_read_element64(v3, 1); in vfae()
173 b0 = s390_vec_read_element64(v3, 0); in vfee()
174 b1 = s390_vec_read_element64(v3, 1); in vfee()
231 b0 = s390_vec_read_element64(v3, 0); in vfene()
232 b1 = s390_vec_read_element64(v3, 1); in vfene()
241 uint32_t b = s390_vec_read_element(v3, enr, es); in vfene()
487 if (s390_vec_read_element(v3, i, es) == 0) { in vstrs()
516 uint32_t e3 = s390_vec_read_element(v3, j - k, es); in vstrs()
[all …]
H A Dvec_helper.c22 void HELPER(gvec_vbperm)(void *v1, const void *v2, const void *v3, in HELPER()
30 const uint8_t bit_nr = s390_vec_read_element8(v3, i); in HELPER()
71 const S390Vector *v3, vpk##BITS##_fn fn) \
82 src = s390_vec_read_element##BITS(v3, i - (128 / BITS)); \
98 void HELPER(gvec_vpk##BITS)(void *v1, const void *v2, const void *v3, \
101 vpk##BITS##_hfn(v1, v2, v3, vpk##BITS##e); \
119 void HELPER(gvec_vpks##BITS)(void *v1, const void *v2, const void *v3, \
122 vpk##BITS##_hfn(v1, v2, v3, vpks##BITS##e); \
124 void HELPER(gvec_vpks_cc##BITS)(void *v1, const void *v2, const void *v3, \
172 void HELPER(gvec_vperm)(void *v1, const void *v2, const void *v3, in HELPER()
[all …]
H A Dtranslate_vx.c.inc704 const uint8_t v3 = get_field(s, v3);
708 if (v3 < v1 || (v3 - v1 + 1) > 16) {
725 if (v1 == v3) {
824 const uint8_t v3 = get_field(s, v3);
865 const uint8_t v3 = get_field(s, v3);
1204 const uint8_t v3 = get_field(s, v3);
1208 while (v3 < v1 || (v3 - v1 + 1) > 16) {
1224 if (v1 == v3) {
1730 const uint8_t v3 = get_field(s, v3);
2103 const uint8_t v3 = get_field(s, v3);
[all …]
H A Dvec_fpu_helper.c270 const float32 b = s390_vec_read_float32(v3, i); in vop32_3()
293 const float64 b = s390_vec_read_float64(v3, i); in vop64_3()
311 const float128 b = s390_vec_read_float128(v3); in vop128_3()
426 const float32 b = s390_vec_read_float32(v3, i); in vfc32()
458 const float64 b = s390_vec_read_float64(v3, i); in vfc64()
484 const float128 b = s390_vec_read_float128(v3); in vfc128()
625 const float32 b = s390_vec_read_float32(v3, i); in vfma32()
668 const float128 b = s390_vec_read_float128(v3); in vfma128()
915 float32 b = s390_vec_read_float32(v3, i); in vfminmax32()
977 float64 b = s390_vec_read_float64(v3, i); in vfminmax64()
[all …]
/qemu/docs/system/
H A Dcpu-models-x86-abi.csv1 Model,baseline,v2,v3,v4
5 Broadwell-v3,✅,✅,✅,
9 Cascadelake-Server-v3,✅,✅,✅,✅
17 Denverton-v3,✅,✅,,
25 EPYC-Rome-v3,✅,✅,✅,
29 EPYC-v3,✅,✅,✅,
34 Haswell-v3,✅,✅,✅,
38 Icelake-Server-v3,✅,✅,✅,✅
59 Skylake-Client-v3,✅,✅,✅,
63 Skylake-Server-v3,✅,✅,✅,✅
[all …]
/qemu/include/qemu/
H A Dxxhash.h56 uint32_t v3 = QEMU_XXHASH_SEED + 0; in qemu_xxhash8() local
74 v3 += c * PRIME32_2; in qemu_xxhash8()
75 v3 = rol32(v3, 13); in qemu_xxhash8()
76 v3 *= PRIME32_1; in qemu_xxhash8()
82 h32 = rol32(v1, 1) + rol32(v2, 7) + rol32(v3, 12) + rol32(v4, 18); in qemu_xxhash8()
192 uint64_t v3, uint64_t v4) in XXH64_mergerounds() argument
196 h64 = rol64(v1, 1) + rol64(v2, 7) + rol64(v3, 12) + rol64(v4, 18); in XXH64_mergerounds()
199 h64 = XXH64_mergeround(h64, v3); in XXH64_mergerounds()
220 uint64_t v3 = QEMU_XXHASH_SEED + 0; in qemu_xxhash64_4() local
225 v3 = XXH64_round(v3, c); in qemu_xxhash64_4()
[all …]
/qemu/target/arm/
H A Darm-qmp-cmds.c44 static inline void gic_cap_kvm_probe(GICCapability *v2, GICCapability *v3) in gic_cap_kvm_probe() argument
60 v3->kernel = true; in gic_cap_kvm_probe()
70 GICCapability *v2 = gic_cap_new(2), *v3 = gic_cap_new(3); in qmp_query_gic_capabilities() local
73 v3->emulated = true; in qmp_query_gic_capabilities()
75 gic_cap_kvm_probe(v2, v3); in qmp_query_gic_capabilities()
78 QAPI_LIST_PREPEND(head, v3); in qmp_query_gic_capabilities()
/qemu/tests/tcg/hexagon/
H A Dpreg_alias.c25 static uint32_t preg_alias(uint8_t v0, uint8_t v1, uint8_t v2, uint8_t v3) in preg_alias() argument
34 : "r"(v0), "r"(v1), "r"(v2), "r"(v3) in preg_alias()
39 static uint32_t preg_alias_pair(uint8_t v0, uint8_t v1, uint8_t v2, uint8_t v3) in preg_alias_pair() argument
48 : "r"(v0), "r"(v1), "r"(v2), "r"(v3) in preg_alias_pair()
H A Dhvx_histogram_row.S39 { v3:2 = v1:0
107 { v3.h = vshuff(v3.h)
114 v3.w = vdmpy(v3.h, r10.h):sat
198 { vshuff(v3, v2, r28)
203 v2.w = vadd(v3.w, v2.w)
/qemu/docs/system/i386/
H A Dkvm-pv.rst51 since Linux v3.1.
55 v3.10.
58 Enable paravirtualized spinlocks support. Supported since Linux v3.12.
/qemu/tests/qemu-iotests/
H A D082.out54 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
80 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
106 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
132 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
158 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
184 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
210 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
236 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
277 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
364 compat=<str> - Compatibility level (v2 [0.10] or v3 [1.1])
[all …]
H A D206.out34 …efcounts": false, "preallocation": "off", "refcount-bits": 16, "size": 67108864, "version": "v3"}}}
51 === Successful image creation (v3 non-default options) ===
58 …ounts": true, "preallocation": "metadata", "refcount-bits": 1, "size": 33554432, "version": "v3"}}}
200 Job failed: Lazy refcounts only supported with compatibility level 1.1 and above (use version=v3 or…
206 …t refcount widths than 16 bits require compatibility level 1.1 or above (use version=v3 or greater)
/qemu/docs/system/arm/
H A Daspeed.rst228 Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``)
233 `Yosemite v3 <https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1…
235 Yosemite v3.5 is an iteration on this design, and is very similar: there's a
241 Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
242 can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-s…
H A Demulation.rst107 - FEAT_PMUv3p1 (PMU Extensions v3.1)
108 - FEAT_PMUv3p4 (PMU Extensions v3.4)
109 - FEAT_PMUv3p5 (PMU Extensions v3.5)
/qemu/tcg/s390x/
H A Dtcg-target.c.inc700 | ((v3 & 0x10) << (4 + 1))
726 tcg_debug_assert(is_vector_reg(v3));
746 tcg_debug_assert(is_vector_reg(v3));
748 tcg_out16(s, v3 << 12);
757 tcg_debug_assert(is_vector_reg(v3));
760 tcg_out16(s, v3 << 12);
781 tcg_debug_assert(is_vector_reg(v3));
805 tcg_debug_assert(is_vector_reg(v3));
1476 src = v3;
1478 tcg_out_mov(s, type, dest, v3);
[all …]
/qemu/migration/
H A Ddirtyrate.c361 uint64_t v1, v2, v3, v4; in compute_page_hash() local
367 v3 = QEMU_XXHASH_SEED + 0; in compute_page_hash()
372 v3 = XXH64_round(v3, p[i + 2]); in compute_page_hash()
375 res = XXH64_mergerounds(v1, v2, v3, v4); in compute_page_hash()
/qemu/target/ppc/
H A Dpower8-pmu-regs.c.inc93 * to ISA v3.1, in 10.4.4 Monitor Mode Control Register 0,
128 * to ISA v3.1, in 10.4.4 Monitor Mode Control Register 0,
153 * state, according to ISA v3.1, section 10.4.6 Monitor Mode
H A Dmeson.build52 'mmu-book3s-v3.c',
/qemu/tests/tcg/cris/libc/
H A Dcheck_addo.c28 uint32_t v3; member

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