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/qemu/hw/net/can/
H A Dtrace-events2 xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) "ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x"
3 xlnx_can_reset(uint32_t val) "Resetting controller with value = 0x%08x"
4 xlnx_can_rx_fifo_filter_reject(uint32_t id, uint8_t dlc) "Frame: ID: 0x%08x DLC: 0x%02x"
5 xlnx_can_filter_id_pre_write(uint8_t filter_num, uint32_t value) "Filter%d ID: 0x%08x"
6 xlnx_can_filter_mask_pre_write(uint8_t filter_num, uint32_t value) "Filter%d MASK: 0x%08x"
7 …nt8_t db6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x
8 …nt8_t db6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x
12 …irq(char *path, uint32_t isr, uint32_t ier, uint32_t irq) "%s: ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x"
13 …nfd_rx_fifo_filter_reject(char *path, uint32_t id, uint8_t dlc) "%s: Frame: ID: 0x%08x DLC: 0x%02x"
14 …th, uint32_t id, uint8_t dlc, uint8_t flags) "%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x"
[all …]
/qemu/hw/intc/
H A Dtrace-events49 …t32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0
64 … int srcno, int server, uint8_t priority) "ics_write_xive: irq 0x%x [src %d] server 0x%x prio 0x%x"
190 …t icid, uint32_t intid) "GICv3 ITS: command MAPTI DeviceID 0x%x EventID 0x%x ICID 0x%x pINTID 0x%x"
195 …int32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0x%x Dbell_pINTID 0x%
196 …t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINT…
263 …t pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x CPPR=0x%02x NSR=0x%…
264 …t pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x CPPR=0x%02x NSR=0x%…
265 …pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x new CPPR=0x%02x NSR=0
268 …_notify(uint8_t end_blk, uint32_t end_idx, uint32_t end_data) "END 0x%02x/0x%04x -> enqueue 0x%08x"
269 …_blk, uint32_t esc_idx, uint32_t end_data) "END 0x%02x/0x%04x -> escalate END 0x%02x/0x%04x data 0
[all …]
/qemu/hw/ppc/
H A Dtrace-events83 …int32_t virt, uint32_t size, uint32_t align, uint32_t ret) "virt=0x%x size=0x%x align=0x%x => 0x%x"
84 vof_release(uint32_t virt, uint32_t size, uint32_t ret) "virt=0x%x size=0x%x => 0x%x"
85 …onst char *method, uint32_t param, uint32_t ret, uint32_t ret2) "ih=0x%x \"%s\"(0x%x) => 0x%x 0x%x"
89 vof_open(const char *path, uint32_t ph, uint32_t ih) "%s ph=0x%x => ih=0x%x"
90 … *cmd, uint32_t param1, uint32_t param2, uint32_t ret, uint32_t ret2) "[%s] 0x%x 0x%x => 0x%x 0x%x"
93 vof_instance_to_package(uint32_t ih, uint32_t ph) "ih=0x%x => ph=0x%x"
139 ppc_dcr_read(uint32_t addr, uint32_t val) "DRCN[0x%x] -> 0x%x"
140 ppc_dcr_write(uint32_t addr, uint32_t val) "DRCN[0x%x] <- 0x%x"
143 prep_systemio_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
147 rs6000mc_id_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
[all …]
/qemu/hw/isa/
H A Dtrace-events10 pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
11 pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
14 apm_io_read(uint8_t addr, uint8_t val) "read addr=0x%x val=0x%02x"
15 apm_io_write(uint8_t addr, uint8_t val) "write addr=0x%x val=0x%02x"
18 via_isa_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
19 via_pm_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
20 via_pm_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
21 via_pm_io_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
22 via_pm_io_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
23 via_superio_read(uint8_t addr, uint8_t val) "addr 0x%x val 0x%x"
[all …]
/qemu/hw/arm/
H A Dsmmuv3-internal.h361 #define CMD_SID(x) ((x)->word[1]) argument
498 #define EVT_SET_TYPE(x, v) ((x)->word[0] = deposit32((x)->word[0], 0 , 8 , v)) argument
499 #define EVT_SET_SSV(x, v) ((x)->word[0] = deposit32((x)->word[0], 11, 1 , v)) argument
500 #define EVT_SET_SSID(x, v) ((x)->word[0] = deposit32((x)->word[0], 12, 20, v)) argument
502 #define EVT_SET_STAG(x, v) ((x)->word[2] = deposit32((x)->word[2], 0 , 16, v)) argument
503 #define EVT_SET_STALL(x, v) ((x)->word[2] = deposit32((x)->word[2], 31, 1 , v)) argument
504 #define EVT_SET_PNU(x, v) ((x)->word[3] = deposit32((x)->word[3], 1 , 1 , v)) argument
505 #define EVT_SET_IND(x, v) ((x)->word[3] = deposit32((x)->word[3], 2 , 1 , v)) argument
506 #define EVT_SET_RNW(x, v) ((x)->word[3] = deposit32((x)->word[3], 3 , 1 , v)) argument
507 #define EVT_SET_S2(x, v) ((x)->word[3] = deposit32((x)->word[3], 7 , 1 , v)) argument
[all …]
H A Dtrace-events12 … index, uint64_t pteaddr, uint64_t pte) "baseaddr=0x%"PRIx64" index=0x%x, pteaddr=0x%"PRIx64", pte…
23 …_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d…
25 smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) "toggled=0x%x, new GERROR=0x%x"
26 smmuv3_write_gerrorn(uint32_t acked, uint32_t gerrorn) "acked=0x%x, new GERRORN=0x%x"
32 …_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d…
34 …d_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "sid=0x%x features:0x%x, sid_split:0x%x"
35 …te_offset, int max_l2_ste) "strtab_base:0x%"PRIx64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx6…
40 …4_t iova, uint64_t translated, int perm) "%s sid=0x%x iova=0x%"PRIx64" translated=0x%"PRIx64" perm…
45 smmuv3_cmdq_cfgi_ste_range(int start, int end) "start=0x%x - end=0x%x"
46 smmuv3_cmdq_cfgi_cd(uint32_t sid) "sid=0x%x"
[all …]
/qemu/hw/usb/
H A Dtrace-events18 …um) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting…
19 …2_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0
26 …t s, uint32_t e, const char *str, ssize_t len, int ret) "0x%.8x eo 0x%.8x\nsa 0x%.8x ea 0x%.8x\ndi…
58 …t32_t head, uint32_t tail, uint32_t next) "ED @ 0x%.8x h=%u c=%u\n head=0x%.8x tailp=0x%.8x next=…
88 … c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ 0x%08x: next 0x%08x qtds 0x%08x,0x%08x,0x%08x"
134 …(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x"
135 usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x"
136 usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
137 usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
289 …arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0
[all …]
/qemu/target/arm/tcg/
H A Diwmmxt_helper.c40 #define NBIT8(x) ((x) & 0x80) argument
41 #define NBIT16(x) ((x) & 0x8000) argument
42 #define NBIT32(x) ((x) & 0x80000000) argument
44 #define ZBIT8(x) (((x) & 0xff) == 0) argument
45 #define ZBIT16(x) (((x) & 0xffff) == 0) argument
47 #define ZBIT64(x) (x == 0) argument
81 #define abs(x) (((x) >= 0) ? x : -x) in HELPER() argument
431 return (x & 0xffffffff) + (x >> 32); in HELPER()
535 x = (int64_t) x >> n; in HELPER()
542 x = ((((x & (0xffffll << 0)) >> n) | in HELPER()
[all …]
/qemu/hw/misc/
H A Dtrace-events127 mos6522_read(uint64_t addr, const char *name, unsigned val) "reg=0x%"PRIx64 " [%s] val=0x%x"
300 via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
301 via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
302 via1_rtc_cmd_invalid(int value) "value=0x%02x"
304 via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
305 via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
309 via1_rtc_cmd_test_write(int value) "value=0x%02x"
313 …sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=0x%x value=0x%02x"
314 …ect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=0x%x value=0x%02x"
344 lasi_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x"
[all …]
/qemu/hw/display/
H A Dtrace-events4 jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
124 vga_std_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
125 vga_std_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
126 vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x, val 0x%x"
127 vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x"
130 vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
131 vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
137 sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
138 sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
165 sm501_i2c_read(uint32_t addr, uint8_t val) "addr=0x%x, val=0x%x"
[all …]
/qemu/hw/net/
H A Dtrace-events36 open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x"
37 open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x"
44 open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[0x%02x] -> 0x%08x"
45 open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[0x%02x] <- 0x%08x"
46 open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[0x%04x] -> 0x%08x"
47 open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[0x%04x] <- 0x%08x"
209 …q_set(uint32_t offset, uint32_t old, uint32_t new) "Setting interrupt register 0x%x: 0x%x --> 0x%x"
414 tulip_mii_write(int phy, int reg, uint16_t data) "phy 0x%x reg 0x%x data 0x%04x"
415 tulip_mii_read(int phy, int reg, uint16_t data) "phy 0x%x, reg 0x%x data 0x%04x"
441 …t data, int options, int status) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x option 0x%04x
[all …]
/qemu/include/qemu/
H A Dlockable.h40 if (x != NULL) { in qemu_null_lockable()
85 _Generic((x), QemuLockable *: (x), \
87 QemuMutex *: qemu_make_lockable(x, QML_OBJ_(x, mutex)), \
88 QemuRecMutex *: qemu_make_lockable(x, QML_OBJ_(x, rec_mutex)), \
89 CoMutex *: qemu_make_lockable(x, QML_OBJ_(x, co_mutex)), \
90 QemuSpin *: qemu_make_lockable(x, QML_OBJ_(x, spin)))
102 _Generic((x), QemuLockable *: (x), \
110 x->lock(x->object);
115 x->unlock(x->object); in qemu_lockable_unlock()
121 return x; in qemu_lockable_auto_lock()
[all …]
H A Dhost-utils.h353 x = ((x & 0xf0) >> 4) in revbit8()
356 x = ((x & 0x88) >> 3) in revbit8()
374 x = bswap16(x); in revbit16()
376 x = ((x & 0xf0f0) >> 4) in revbit16()
397 x = bswap32(x); in revbit32()
420 x = bswap64(x); in revbit64()
747 x |= (x >> 1); in pow2roundup32()
748 x |= (x >> 2); in pow2roundup32()
749 x |= (x >> 4); in pow2roundup32()
750 x |= (x >> 8); in pow2roundup32()
[all …]
H A Dbitops.h536 x = ((x & 0xFF00) << 8) | (x & 0x00FF); in half_shuffle32()
537 x = ((x << 4) | x) & 0x0F0F0F0F; in half_shuffle32()
538 x = ((x << 2) | x) & 0x33333333; in half_shuffle32()
539 x = ((x << 1) | x) & 0x55555555; in half_shuffle32()
566 x = ((x << 8) | x) & 0x00FF00FF00FF00FFULL; in half_shuffle64()
567 x = ((x << 4) | x) & 0x0F0F0F0F0F0F0F0FULL; in half_shuffle64()
568 x = ((x << 2) | x) & 0x3333333333333333ULL; in half_shuffle64()
596 x = ((x >> 1) | x) & 0x33333333; in half_unshuffle32()
597 x = ((x >> 2) | x) & 0x0F0F0F0F; in half_unshuffle32()
598 x = ((x >> 4) | x) & 0x00FF00FF; in half_unshuffle32()
[all …]
/qemu/hw/s390x/
H A Dtrace-events5 …t8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=0x%x, erc=0x%x, rsid=0x%x %s"
6 css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type 0x%02x)"
8 …n, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno 0x%04x)"
9 … isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm 0x%08x, isc 0x%x) %s"
11 css_do_sic(uint16_t mode, uint8_t isc) "CSS: set interruption mode 0x%x on isc 0x%x"
14 …_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command 0x%x"
15 …chid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno 0x%04x (%s)"
16 …t64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": 0x%x->0x%x"
33 …, uint32_t did, uint32_t fid, uint32_t fh) "g_l2 %d vendor id 0x%x device id 0x%x fid 0x%x fh 0x%x"
34 s390_pci_list(uint32_t rc) "failed rc 0x%x"
[all …]
/qemu/hw/i386/
H A Dtrace-events29 …4_t slpte, uint16_t domain) "IOTLB page hit sid 0x%"PRIx16" iova 0x%"PRIx64" slpte 0x%"PRIx64" dom…
44 …slot, uint8_t fn, uint64_t iova, uint64_t size) "Device %02x:%02x.%x start 0x%"PRIx64" size 0x%"PR…
49 …_write(uint64_t addr, uint64_t size, uint64_t val) "addr 0x%"PRIx64" size 0x%"PRIx64" value 0x%"PR…
56 …t64_t iova, uint64_t gpa, uint64_t mask) "dev %02x:%02x.%02x iova 0x%"PRIx64" -> gpa 0x%"PRIx64" m…
63 … data, uint64_t addr2, uint64_t data2) "(addr 0x%"PRIx64", data 0x%"PRIx64") -> (addr 0x%"PRIx64",…
74 …t64_t gpa, uint64_t txaddr) " update iotlb domid 0x%"PRIx16" devid: %02x:%02x.%x gpa 0x%"PRIx64" h…
98 …t func, uint64_t addr, uint64_t txaddr) "hit iotlb devid %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx…
99 …t, uint8_t func, uint64_t addr, uint64_t txaddr) "devid: %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx…
115 vmport_command(unsigned char command) "command: 0x%02x"
122 port92_read(uint8_t val) "port92: read 0x%02x"
[all …]
/qemu/hw/scsi/
H A Dtrace-events16 …n, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key 0x%02x asc 0x%02x ascq 0x%02x"
17 …t target, int lun, int key, int asc, int ascq) "target %d lun %d key 0x%02x asc 0x%02x ascq 0x%02x"
25 mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
26 mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
29 mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
32 mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
121 megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
184 esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
214 esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
249 lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) "DMA Interrupt 0x%x prev 0x%x"
[all …]
/qemu/target/sparc/
H A Dtrace-events6 mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at 0x%"PRIx64" context 0x%"PRIx64
8 mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at 0x%"PRIx64" context 0x%"PRIx64
18 int_helper_set_softint(uint32_t softint) "new 0x%08x"
19 int_helper_clear_softint(uint32_t softint) "new 0x%08x"
20 int_helper_write_softint(uint32_t softint) "new 0x%08x"
21 sparc64_cpu_check_irqs_reset_irq(int intno) "Reset CPU IRQ (current interrupt 0x%x)"
22 …_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d current 0x%x >= pending 0x%x"
23 sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) "Set CPU IRQ %d old=0x%x new=0x%x"
24 … softint, int intno) "Interrupts disabled, pil=0x%08x pil_in=0x%08x softint=0x%08x current interru…
28 …e(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=0x%x new=0x%x"
[all …]
/qemu/hw/pci-host/
H A Dtrace-events14 …ddr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 …
17 …me, uint64_t poffs, uint64_t size, uint64_t moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64
19 mv64361_reg_read(uint64_t addr, uint32_t val) "0x%"PRIx64" -> 0x%x"
20 mv64361_reg_write(uint64_t addr, uint64_t val) "0x%"PRIx64" <- 0x%"PRIx64
26 sabre_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64
37 unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
38 unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
48 …ze, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" P…
50 …_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" P…
59 dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x"
[all …]
/qemu/hw/acpi/
H A Dtrace-events6 mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
7 mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
8 mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
9 mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
10 mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
11 mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
13 mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
28 cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8
30 cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%"PRIx8
60 tco_io_write(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
[all …]
/qemu/hw/i2c/
H A Dtrace-events5 bitbang_i2c_addr(uint8_t addr) "Address 0x%02x"
6 bitbang_i2c_send(uint8_t byte) "TX byte 0x%02x"
7 bitbang_i2c_recv(uint8_t byte) "RX byte 0x%02x"
12 i2c_event(const char *event, uint8_t address) "%s(addr:0x%02x)"
13 i2c_send(uint8_t address, uint8_t data) "send(addr:0x%02x) data:0x%02x"
14 i2c_send_async(uint8_t address, uint8_t data) "send_async(addr:0x%02x) data:0x%02x"
15 i2c_recv(uint8_t address, uint8_t data) "recv(addr:0x%02x) data:0x%02x"
20 smbus_ioport_readb(uint16_t addr, uint8_t data) "[0x%04" PRIx16 "] -> val=0x%02x"
21 smbus_ioport_writeb(uint16_t addr, uint8_t data) "[0x%04" PRIx16 "] <- val=0x%02x"
22 smbus_transaction(uint8_t addr, uint8_t prot) "addr=0x%02x prot=0x%02x"
[all …]
/qemu/hw/sd/
H A Dtrace-events14 bcm2835_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%x"
18 sdbus_read(const char *bus_name, uint8_t value) "@%s value 0x%02x"
19 sdbus_write(const char *bus_name, uint8_t value) "@%s value 0x%02x"
28 sdhci_response4(uint32_t r0) "RSPREG[31..0]=0x%08x"
29 …32_t r1, uint32_t r0) "RSPREG[127..96]=0x%08x, RSPREG[95..64]=0x%08x, RSPREG[63..32]=0x%08x, RSPRE…
32 …i_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) "addr=0x%08" PRIx64 ", len=%d, attr=0x%x"
46 sdcard_set_blocklen(uint16_t length) "0x%03x"
52 sdcard_read_block(uint64_t addr, uint32_t len) "addr 0x%" PRIx64 " size 0x%x"
53 sdcard_write_block(uint64_t addr, uint32_t len) "addr 0x%" PRIx64 " size 0x%x"
59 pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x"
[all …]
/qemu/hw/vfio/
H A Dtrace-events11 …_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
23 …ad(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
24 vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
27 vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) 0x%x"
28 vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
36 …p_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
43 vfio_add_ext_cap_dropped(const char *name, uint16_t cap, uint16_t offset) "%s 0x%x@0x%x"
64 …d(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) 0x%"PRIx64
65 …onst char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
87 …rite(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [0x%03x] 0x%08x -> 0x%08x"
[all …]
/qemu/hw/input/
H A Dtrace-events5 adb_device_kbd_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x"
6 adb_device_kbd_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x"
7 adb_device_kbd_request_change_addr(int devaddr) "change addr to 0x%x"
8 …d_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x"
13 …_device_mouse_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x"
15 …e_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x"
25 pckbd_kbd_read_data(uint32_t val) "0x%02x"
26 pckbd_kbd_read_status(int status) "0x%02x"
27 pckbd_outport_write(uint32_t val) "0x%02x"
32 ps2_put_keycode(void *opaque, int keycode) "%p keycode 0x%02x"
[all …]
/qemu/hw/dma/
H A Dtrace-events4 jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
5 jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
6 rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
7 rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
14 espdma_memory_read(uint32_t addr, int len) "DMA read addr 0x%08x len %d"
15 espdma_memory_write(uint32_t addr, int len) "DMA write addr 0x%08x len %d"
16 sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg 0x%"PRIx64": 0x%08x"
17 …_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg 0x%"PRIx64": 0x%08x -> 0x%08x"
31 …nt8_t bs, uint8_t lc, uint8_t ch, uint8_t flag) "nf=0x%02x bs=0x%02x lc=0x%02x ch=0x%02x flag=0x%0…
44 pl330_iomem_write(uint32_t offset, uint32_t value) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32
[all …]

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