/qemu/system/ |
H A D | physmem.c | 1295 char *c; in file_ram_open() local 1339 for (c = sanitized_name; *c != '\0'; c++) { in file_ram_open() 1340 if (*c == '/') { in file_ram_open() 1341 *c = '_'; in file_ram_open() 2953 uint8_t c, hwaddr len, MemTxAttrs attrs) in address_space_set() argument 2960 memset(fillbuf, c, FILLBUF_SIZE); in address_space_set()
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H A D | dma-helpers.c | 22 uint8_t c, dma_addr_t len, MemTxAttrs attrs) in dma_memory_set() argument 26 return address_space_set(as, addr, c, len, attrs); in dma_memory_set()
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/qemu/include/hw/loongarch/ |
H A D | boot.h | 24 #define EFI_GUID(a, b, c, d...) (efi_guid_t){ { \ argument 27 (c) & 0xff, ((c) >> 8) & 0xff, d } }
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/qemu/include/exec/ |
H A D | memory.h | 3149 uint8_t c, hwaddr len, MemTxAttrs attrs);
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/qemu/hw/mips/ |
H A D | loongson3_bootp.c | 32 struct efi_cpuinfo_loongson *c = g_cpuinfo; in init_cpu_info() local 34 c->cputype = cpu_to_le32(Loongson_3A); in init_cpu_info() 35 c->processor_id = cpu_to_le32(MIPS_CPU(first_cpu)->env.CP0_PRid); in init_cpu_info() 37 c->cpu_clock_freq = cpu_to_le32(UINT_MAX); in init_cpu_info() 39 c->cpu_clock_freq = cpu_to_le32(cpu_freq); in init_cpu_info() 42 c->cpu_startup_core_id = cpu_to_le16(0); in init_cpu_info() 43 c->nr_cpus = cpu_to_le32(current_machine->smp.cpus); in init_cpu_info() 44 c->total_node = cpu_to_le32(DIV_ROUND_UP(current_machine->smp.cpus, in init_cpu_info()
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/qemu/hw/intc/ |
H A D | trace-events | 3 # i8259.c 10 # apic_common.c 14 # apic.c 20 # ioapic.c 29 # kvm_irqcount.c 55 # xics.c 72 # s390_flic.c 76 # aspeed_vic.c 83 # arm_gic.c 262 # xive.c [all …]
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/qemu/tcg/ |
H A D | optimize.c | 614 switch (c) { in do_constant_folding_cond_32() 648 switch (c) { in do_constant_folding_cond_64() 682 switch (c) { in do_constant_folding_cond_eq() 728 switch (c) { in do_constant_folding_cond() 852 TCGCond c; in do_constant_folding_cond2() local 857 c = args[4]; in do_constant_folding_cond2() 859 args[4] = c = tcg_swap_cond(c); in do_constant_folding_cond2() 884 switch (c) { in do_constant_folding_cond2() 897 if (b == -1 && is_tst_cond(c)) { in do_constant_folding_cond2() 919 if (is_tst_cond(c)) { in do_constant_folding_cond2() [all …]
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H A D | tcg-op-gvec.c | 79 check_overlap_2(d, c, s); in check_overlap_4() 81 check_overlap_2(a, c, s); in check_overlap_4() 82 check_overlap_2(b, c, s); in check_overlap_4() 147 fn(a0, a1, c, desc); in tcg_gen_gvec_2i_ool() 382 return c; in uint64_t() 735 fni(t1, t0, c); in expand_2i_i32() 753 fni(t1, c, t0); in expand_2s_i32() 755 fni(t1, t0, c); in expand_2s_i32() 803 fni(t2, t0, t1, c); in expand_3i_i32() 898 fni(t1, t0, c); in expand_2i_i64() [all …]
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/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 4 * Copyright (c) 2008 Fabrice Bellard 25 #include "../tcg-ldst.c.inc" 26 #include "../tcg-pool.c.inc" 1339 rexw = c & -8; 1340 c &= 7; 1343 switch (c) { 2659 c = ARITH_ADD; 2662 c = ARITH_SUB; 2665 c = ARITH_AND; 2668 c = ARITH_OR; [all …]
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/qemu/include/tcg/ |
H A D | tcg-op-gvec-common.h | 31 void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c, 239 uint32_t oprsz, uint32_t maxsz, int64_t c, 244 uint32_t oprsz, uint32_t maxsz, int64_t c, 266 int64_t c, uint32_t oprsz, uint32_t maxsz); 268 int64_t c, uint32_t oprsz, uint32_t maxsz); 315 int64_t c, uint32_t oprsz, uint32_t maxsz); 319 int64_t c, uint32_t oprsz, uint32_t maxsz); 380 uint32_t aofs, int64_t c, 383 uint32_t aofs, TCGv_i64 c, 417 void tcg_gen_vec_rotl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c); [all …]
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/qemu/target/sparc/ |
H A D | insns.decode | 4 # Copyright (c) 2023 Richard Henderson <rth@twiddle.net>
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H A D | mmu_helper.c | 452 uint8_t c[4]; in sparc_cpu_memory_rw_debug() member 455 *buf++ = u.c[off & 3]; in sparc_cpu_memory_rw_debug()
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/qemu/target/tricore/ |
H A D | cpu.c | 174 static void tricore_cpu_class_init(ObjectClass *c, void *data) in tricore_cpu_class_init() argument 176 TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c); in tricore_cpu_class_init() 177 CPUClass *cc = CPU_CLASS(c); in tricore_cpu_class_init() 178 DeviceClass *dc = DEVICE_CLASS(c); in tricore_cpu_class_init() 179 ResettableClass *rc = RESETTABLE_CLASS(c); in tricore_cpu_class_init()
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/qemu/target/s390x/tcg/ |
H A D | mem_helper.c | 863 c = c & 0xff; in HELPER() 2598 c = (c << 6) | (s1 & 0x3f); in decode_utf8() 2611 c = (c << 6) | (s1 & 0x3f); in decode_utf8() 2612 c = (c << 6) | (s2 & 0x3f); in decode_utf8() 2620 || (c >= 0xd800 && c <= 0xdfff))) { in decode_utf8() 2633 c = (c << 6) | (s1 & 0x3f); in decode_utf8() 2634 c = (c << 6) | (s2 & 0x3f); in decode_utf8() 2635 c = (c << 6) | (s3 & 0x3f); in decode_utf8() 2678 c = (c << 6) | (s0 & 0x3f); in decode_utf16() 2679 c = (c << 10) | (s1 & 0x3ff); in decode_utf16() [all …]
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/qemu/target/sh4/ |
H A D | helper.c | 482 entry->c = (uint8_t)cpu_ptel_c(env->ptel); in cpu_load_tlb() 552 (entry->c << 3) | in cpu_sh4_read_mmaped_itlb_data() 580 entry->c = (mem_value & 0x00000008) >> 3; in cpu_sh4_write_mmaped_itlb_data() 694 (entry->c << 3) | in cpu_sh4_read_mmaped_utlb_data() 726 entry->c = (mem_value & 0x00000008) >> 3; in cpu_sh4_write_mmaped_utlb_data() 772 return env->itlb[n].c; in cpu_sh4_is_cached() 776 return env->utlb[n].c; in cpu_sh4_is_cached()
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/qemu/target/ppc/ |
H A D | kvm.c | 2423 if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_L1D_FLUSH_PR) { in parse_cap_ppc_safe_cache() 2426 c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) && in parse_cap_ppc_safe_cache() 2427 (c.character & c.character_mask in parse_cap_ppc_safe_cache() 2437 if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR) { in parse_cap_ppc_safe_bounds_check() 2439 } else if (c.character & c.character_mask & H_CPU_CHAR_SPEC_BAR_ORI31) { in parse_cap_ppc_safe_bounds_check() 2448 if ((~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_FLUSH_COUNT_CACHE) && in parse_cap_ppc_safe_indirect_branch() 2449 (~c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) && in parse_cap_ppc_safe_indirect_branch() 2450 (~c.character & c.character_mask & H_CPU_CHAR_BCCTRL_SERIALISED)) { in parse_cap_ppc_safe_indirect_branch() 2454 } else if (c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) { in parse_cap_ppc_safe_indirect_branch() 2456 } else if (c.character & c.character_mask & H_CPU_CHAR_BCCTRL_SERIALISED) { in parse_cap_ppc_safe_indirect_branch() [all …]
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/qemu/target/m68k/ |
H A D | helper.c | 1233 #define COMPUTE_CCR(op, x, n, z, v, c) { \ argument 1244 c = x; \ 1254 c = x; \ 1266 c = src1 < src2; \ 1270 c = v = 0; \ 1280 uint32_t x, c, n, z, v; in cpu_m68k_get_ccr() local 1287 c = env->cc_c; in cpu_m68k_get_ccr() 1289 COMPUTE_CCR(env->cc_op, x, n, z, v, c); in cpu_m68k_get_ccr() 1295 return x * CCF_X + n * CCF_N + z * CCF_Z + v * CCF_V + c * CCF_C; in cpu_m68k_get_ccr()
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/qemu/target/hexagon/ |
H A D | meson.build | 31 'gen_semantics.c', 249 'cpu.c', 250 'translate.c', 251 'op_helper.c', 252 'gdbstub.c', 253 'genptr.c', 255 'decode.c', 256 'iclass.c', 257 'opcodes.c', 259 'arch.c', [all …]
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H A D | README | 41 target/hexagon/gen_semantics.c. This step produces 49 gen_tcg_funcs.py -> tcg_funcs_generated.c.inc 51 gen_helper_funcs.py -> helper_funcs_generated.c.inc 76 tcg_funcs_generated.c.inc 91 helper_funcs_generated.c.inc 192 Step 1 is to run target/hexagon/gen_dectree_import.c to produce 199 <BUILD_DIR>/target/hexagon/decode_*_generated.c.inc 221 translate.c 230 genptr.c 236 op_helper.c [all …]
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H A D | attribs_def.h.inc | 2 * Copyright(c) 2019-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
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H A D | cpu.c | 332 static void hexagon_cpu_class_init(ObjectClass *c, void *data) in hexagon_cpu_class_init() argument 334 HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c); in hexagon_cpu_class_init() 335 CPUClass *cc = CPU_CLASS(c); in hexagon_cpu_class_init() 336 DeviceClass *dc = DEVICE_CLASS(c); in hexagon_cpu_class_init() 337 ResettableClass *rc = RESETTABLE_CLASS(c); in hexagon_cpu_class_init()
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H A D | gen_printinsn.py | 58 c = s[i] 59 if c == "(": 61 elif c == ")": 130 for allregs, a, b, c, d, allimm, immlett, bits, immshift in regs_or_imms:
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/qemu/target/arm/tcg/ |
H A D | mte_helper.c | 805 uint32_t sizem1, tag_count, n, c; in mte_probe_int() local 862 n = c = (next_page - tag_first) / TAG_GRANULE; in mte_probe_int() 864 n = checkN(mem1, ptr & TAG_GRANULE, ptr_tag, c); in mte_probe_int() 866 if (n == c) { in mte_probe_int() 870 n += checkN(mem2, 0, ptr_tag, tag_count - c); in mte_probe_int()
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H A D | sve_helper.c | 1252 uint64_t c = extract64(m[i], 32, 1); local 1254 d[i] = c + e1 + e2; 1268 Int128 c = int128_make64(m[i + 1] & 1); in HELPER() local 1269 Int128 r = int128_add(int128_add(e1, e2), c); in HELPER()
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/qemu/include/sysemu/ |
H A D | kvm.h | 455 int kvm_irqchip_add_msi_route(KVMRouteChange *c, int vector, PCIDevice *dev); 465 static inline void kvm_irqchip_commit_route_changes(KVMRouteChange *c) in kvm_irqchip_commit_route_changes() argument 467 if (c->changes) { in kvm_irqchip_commit_route_changes() 468 kvm_irqchip_commit_routes(c->s); in kvm_irqchip_commit_route_changes() 469 c->changes = 0; in kvm_irqchip_commit_route_changes()
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