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Searched refs:cpu (Results 1 – 25 of 839) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...34

/qemu/target/arm/tcg/
H A D	cpu32.c	28 t = cpu->isar.id_isar5; in aa32_max_features() 47 t = cpu->isar.mvfr1; in aa32_max_features() 50 cpu->isar.mvfr1 = t; in aa32_max_features() 52 t = cpu->isar.mvfr2; in aa32_max_features() 55 cpu->isar.mvfr2 = t; in aa32_max_features() 120 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1); in arm926_initfn() 121 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSP, 1); in arm926_initfn() 122 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPDP, 1); in arm926_initfn() 162 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1); in arm1026_initfn() 163 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSP, 1); in arm1026_initfn() [all …]
H A D	cpu-v7m.c	23 ARMCPU cpu = ARM_CPU(cs); in arm_v7m_cpu_exec_interrupt() local 24 CPUARMState env = &cpu->env; in arm_v7m_cpu_exec_interrupt() 52 cpu->midr = 0x410cc200; in cortex_m0_initfn() 85 cpu->midr = 0x410fc231; in cortex_m3_initfn() 86 cpu->pmsav7_dregion = 8; in cortex_m3_initfn() 113 cpu->pmsav7_dregion = 8; in cortex_m4_initfn() 175 cpu->sau_sregion = 8; in cortex_m33_initfn() 195 cpu->ctr = 0x8000c000; in cortex_m33_initfn() 209 cpu->revidr = 0; in cortex_m55_initfn() 211 cpu->sau_sregion = 8; in cortex_m55_initfn() [all …]
H A D	cpu64.c	75 cpu->revidr = 0; in aarch64_a35_initfn() 80 cpu->id_afr0 = 0; in aarch64_a35_initfn() 272 cpu->revidr = 0; in aarch64_a55_initfn() 397 cpu->revidr = 0; in aarch64_a76_initfn() 637 cpu->revidr = 0; in aarch64_neoverse_n1_initfn() 725 cpu->ccsidr[1] = cpu->ccsidr[0]; /* L1 icache */ in aarch64_neoverse_v1_initfn() 1115 cpu->midr = t; in aarch64_max_tcg_initfn() 1121 u = cpu->clidr; in aarch64_max_tcg_initfn() 1124 cpu->clidr = u; in aarch64_max_tcg_initfn() 1131 t = cpu->ctr; in aarch64_max_tcg_initfn() [all …]
/qemu/tests/tcg/mips/user/ase/msa/
H A D	test_msa_run_64r6eb.sh	8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6eb 9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6eb 10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6eb 11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6eb 12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6eb 13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6eb 14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6eb 15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6eb 16 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6eb 17 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6eb [all …]
H A D	test_msa_run_64r6el.sh	8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6el 9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6el 10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6el 11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6el 12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6el 13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6el 14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6el 15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6el 16 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6el 17 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6el [all …]
H A D	test_msa_run_32r5eb.sh	8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5eb 9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5eb 10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5eb 11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5eb 12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5eb 13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5eb 14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5eb 15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5eb 16 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_b_32r5eb 17 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_h_32r5eb [all …]
H A D	test_msa_run_32r5el.sh	8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5el 9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5el 10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5el 11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5el 12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5el 13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5el 14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5el 15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5el 16 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_b_32r5el 17 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_h_32r5el [all …]
/qemu/target/arm/
H A D	cpu64.c	69 cpu->sve_vq.supported = kvm_arm_sve_get_vls(cpu); in arm_cpu_sve_finalize() 88 if (cpu->sve_max_vq && max_vq > cpu->sve_max_vq) { in arm_cpu_sve_finalize() 518 if (cpu->prop_pauth_impdef && cpu->prop_pauth_qarma3) { in arm_cpu_pauth_finalize() 534 } else if (cpu->prop_pauth_impdef \|\| cpu->prop_pauth_qarma3) { in arm_cpu_pauth_finalize() 567 cpu->prop_pauth = cpu_isar_feature(aa64_pauth, cpu); in aarch64_add_pauth_properties() 582 if (!cpu->prop_lpa2) { in arm_cpu_lpa2_finalize() 615 cpu->ctr = 0x8444c004; in aarch64_a57_initfn() 645 cpu->gic_num_lrs = 4; in aarch64_a57_initfn() 648 cpu->gic_pribits = 5; in aarch64_a57_initfn() 703 cpu->gic_num_lrs = 4; in aarch64_a53_initfn() [all …]
H A D	cpu.c	236 g_hash_table_foreach(cpu->cp_regs, cp_reg_reset, cpu); in arm_cpu_reset_hold() 237 g_hash_table_foreach(cpu->cp_regs, cp_reg_check_reset, cpu); in arm_cpu_reset_hold() 1486 qdev_init_gpio_out(DEVICE(cpu), cpu->gt_timer_outputs, in arm_cpu_initfn() 1491 qdev_init_gpio_out_named(DEVICE(cpu), &cpu->pmu_interrupt, in arm_cpu_initfn() 2063 cpu->ctr = FIELD_DP64(cpu->ctr, CTR_EL0, DIC, 0); in arm_cpu_realizefn() 2067 cpu->has_vfp != cpu->has_neon) { in arm_cpu_realizefn() 2077 if (cpu->has_vfp_d32 != cpu->has_neon) { in arm_cpu_realizefn() 2188 if (!cpu->has_neon && !cpu->has_vfp) { in arm_cpu_realizefn() 2304 cpu->isar.id_aa64pfr0 = FIELD_DP64(cpu->isar.id_aa64pfr0, in arm_cpu_realizefn() 2346 cpu->isar.id_pfr1 = FIELD_DP32(cpu->isar.id_pfr1, in arm_cpu_realizefn() [all …]
/qemu/accel/tcg/
H A D	tcg-accel-ops-rr.c	43 CPUState cpu; in rr_kick_vcpu_thread() local 73 CPUState cpu; in rr_kick_next_cpu() local 76 if (cpu) { in rr_kick_next_cpu() 110 CPUState cpu; in rr_wait_io_event() local 130 CPUState cpu; in rr_deal_with_unplugged_cpus() local 133 if (cpu->unplug && !cpu_can_run(cpu)) { in rr_deal_with_unplugged_cpus() 157 CPUState *cpu; in rr_cpu_count() local 245 while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) { in rr_cpu_thread_fn() 278 cpu = CPU_NEXT(cpu); in rr_cpu_thread_fn() 283 cpu = CPU_NEXT(cpu); in rr_cpu_thread_fn() [all …]
H A D	cpu-exec.c	24 #include "hw/core/tcg-cpu-ops.h" 34 #include "exec/cpu-all.h" 35 #include "sysemu/cpu-timers.h" 69 static void align_clocks(SyncClocks sc, CPUState cpu) in align_clocks() argument 77 cpu_icount = cpu->icount_extra + cpu->neg.icount_decr.u16.low; in align_clocks() 120 static void init_delay_params(SyncClocks sc, CPUState cpu) in init_delay_params() argument 128 = cpu->icount_extra + cpu->neg.icount_decr.u16.low; in init_delay_params() 141 static void align_clocks(SyncClocks sc, const CPUState cpu) in align_clocks() argument 145 init_delay_params(SyncClocks * sc,const CPUState * cpu) init_delay_params() argument 150 tcg_cflags_has(CPUState * cpu,uint32_t flags) tcg_cflags_has() argument 155 tcg_cflags_set(CPUState * cpu,uint32_t flags) tcg_cflags_set() argument 160 curr_cflags(CPUState * cpu) curr_cflags() argument 228 tb_htable_lookup(CPUState * cpu,vaddr pc,uint64_t cs_base,uint32_t flags,uint32_t cflags) tb_htable_lookup() argument 252 tb_lookup(CPUState * cpu,vaddr pc,uint64_t cs_base,uint32_t flags,uint32_t cflags) tb_lookup() argument 292 log_cpu_exec(vaddr pc,CPUState * cpu,const TranslationBlock * tb) log_cpu_exec() argument 323 check_for_breakpoints_slow(CPUState * cpu,vaddr pc,uint32_t * cflags) check_for_breakpoints_slow() argument 389 check_for_breakpoints(CPUState * cpu,vaddr pc,uint32_t * cflags) check_for_breakpoints() argument 406 CPUState cpu = env_cpu(env); HELPER() local 450 cpu_tb_exec(CPUState cpu,TranslationBlock * itb,int * tb_exit) cpu_tb_exec() argument 516 cpu_exec_enter(CPUState * cpu) cpu_exec_enter() argument 525 cpu_exec_exit(CPUState * cpu) cpu_exec_exit() argument 534 cpu_exec_longjmp_cleanup(CPUState * cpu) cpu_exec_longjmp_cleanup() argument 571 cpu_exec_step_atomic(CPUState * cpu) cpu_exec_step_atomic() argument 680 cpu_handle_halt(CPUState * cpu) cpu_handle_halt() argument 700 cpu_handle_debug_exception(CPUState * cpu) cpu_handle_debug_exception() argument 716 cpu_handle_exception(CPUState * cpu,int * ret) cpu_handle_exception() argument 781 icount_exit_request(CPUState * cpu) icount_exit_request() argument 792 cpu_handle_interrupt(CPUState * cpu,TranslationBlock ** last_tb) cpu_handle_interrupt() argument 909 cpu_loop_exec_tb(CPUState * cpu,TranslationBlock * tb,vaddr pc,TranslationBlock ** last_tb,int * tb_exit) cpu_loop_exec_tb() argument 958 cpu_exec_loop(CPUState * cpu,SyncClocks * sc) cpu_exec_loop() argument 1038 cpu_exec_setjmp(CPUState * cpu,SyncClocks * sc) cpu_exec_setjmp() argument 1048 cpu_exec(CPUState * cpu) cpu_exec() argument 1077 tcg_exec_realizefn(CPUState * cpu,Error ** errp) tcg_exec_realizefn() argument 1097 tcg_exec_unrealizefn(CPUState * cpu) tcg_exec_unrealizefn() argument [all...]
H A D	tcg-accel-ops-mttcg.c	41 CPUState cpu; member 50 CPUState cpu = container_of(notify, MttcgForceRcuNotifier, notifier)->cpu; in mttcg_force_rcu() local 68 CPUState *cpu = arg; in mttcg_cpu_thread_fn() local 75 force_rcu.cpu = cpu; in mttcg_cpu_thread_fn() 83 cpu->neg.can_do_io = true; in mttcg_cpu_thread_fn() 84 current_cpu = cpu; in mttcg_cpu_thread_fn() 89 cpu->exit_request = 1; in mttcg_cpu_thread_fn() 119 } while (!cpu->unplug \|\| cpu_can_run(cpu)); in mttcg_cpu_thread_fn() 121 tcg_cpu_destroy(cpu); in mttcg_cpu_thread_fn() 130 cpu_exit(cpu); in mttcg_kick_vcpu_thread() [all …]
/qemu/target/i386/hvf/
H A D	x86.h	`229 #define AX(cpu) RX(cpu, R_EAX) argument 230 #define CX(cpu) RX(cpu, R_ECX) argument 231 #define DX(cpu) RX(cpu, R_EDX) argument 232 #define BP(cpu) RX(cpu, R_EBP) argument 233 #define SP(cpu) RX(cpu, R_ESP) argument 234 #define BX(cpu) RX(cpu, R_EBX) argument 235 #define SI(cpu) RX(cpu, R_ESI) argument 236 #define DI(cpu) RX(cpu, R_EDI) argument 239 #define AL(cpu) RL(cpu, R_EAX) argument 240 #define CL(cpu) RL(cpu, R_ECX) argument [all …]`
H A D	hvf.c	`212 cpus_kick_thread(cpu); in hvf_kick_vcpu_thread() 288 x86cpu = X86_CPU(cpu); in hvf_arch_init_vcpu() 430 vmx_update_tpr(cpu); in hvf_vcpu_exec() 433 if (!cpu_is_bsp(X86_CPU(cpu)) && cpu->halted) { in hvf_vcpu_exec() 456 current_cpu = cpu; in hvf_vcpu_exec() 533 load_regs(cpu); in hvf_vcpu_exec() 537 store_regs(cpu); in hvf_vcpu_exec() 592 load_regs(cpu); in hvf_vcpu_exec() 599 store_regs(cpu); in hvf_vcpu_exec() 606 load_regs(cpu); in hvf_vcpu_exec() [all …]`
H A D	x86.c	118 bool x86_is_protected(CPUState cpu) in x86_is_protected() argument 124 bool x86_is_real(CPUState cpu) in x86_is_real() argument 126 return !x86_is_protected(cpu); in x86_is_real() 129 bool x86_is_v8086(CPUState cpu) in x86_is_v8086() argument 131 X86CPU x86_cpu = X86_CPU(cpu); in x86_is_v8086() 136 bool x86_is_long_mode(CPUState cpu) in x86_is_long_mode() argument 141 bool x86_is_long64_mode(CPUState cpu) in x86_is_long64_mode() argument 149 bool x86_is_paging_mode(CPUState cpu) in x86_is_paging_mode() argument 155 bool x86_is_pae_enabled(CPUState cpu) in x86_is_pae_enabled() argument 179 return linear_addr(cpu, addr, seg); in linear_addr_size() [all …]
/qemu/system/
H A D	cpus.c	88 if (cpu->stop \|\| !cpu_work_list_empty(cpu)) { in cpu_thread_is_idle() 94 if (!cpu->halted \|\| cpu_has_work(cpu)) { in cpu_thread_is_idle() 105 CPUState cpu; in all_cpu_threads_idle() local 119 CPUState cpu; in hw_error() local 135 CPUState cpu; in cpu_synchronize_all_states() local 144 CPUState cpu; in cpu_synchronize_all_post_reset() local 153 CPUState cpu; in cpu_synchronize_all_post_init() local 162 CPUState cpu; in cpu_synchronize_all_pre_loadvm() local 563 CPUState cpu; in all_vcpus_paused() local 576 CPUState cpu; in pause_all_vcpus() local [all …]
/qemu/hw/core/
H A D	cpu-common.c	`39 CPUState *cpu; in cpu_by_arch_id() local 41 CPU_FOREACH(cpu) { in cpu_by_arch_id() 45 return cpu; in cpu_by_arch_id() 65 return cpu; in cpu_create() 129 cpu->halted = cpu->start_powered_off; in cpu_common_reset_hold() 130 cpu->mem_io_pc = 0; in cpu_common_reset_hold() 131 cpu->icount_extra = 0; in cpu_common_reset_hold() 222 cpu_resume(cpu); in cpu_common_realizefn() 255 gdb_init_cpu(cpu); in cpu_common_initfn() 260 cpu->nr_cores = 1; in cpu_common_initfn() [all …]`
H A D	cpu-sysemu.c	26 bool cpu_paging_enabled(const CPUState cpu) in cpu_paging_enabled() argument 28 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_paging_enabled() 40 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_get_memory_mapping() 53 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_get_phys_page_attrs_debug() 75 ret = cpu->cc->sysemu_ops->asidx_from_attrs(cpu, attrs); in cpu_asidx_from_attrs() 84 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_write_elf32_qemunote() 95 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_write_elf32_note() 106 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_write_elf64_qemunote() 117 CPUClass cc = CPU_GET_CLASS(cpu); in cpu_write_elf64_note() 127 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_virtio_is_big_endian() [all …]
/qemu/target/riscv/tcg/
H A D	tcg-cpu.c	528 if (cpu->cfg.ext_zvfh && !cpu->cfg.ext_zfhmin) { in riscv_cpu_validate_set_extensions() 548 if ((cpu->cfg.ext_zdinx \|\| cpu->cfg.ext_zhinxmin) && !cpu->cfg.ext_zfinx) { in riscv_cpu_validate_set_extensions() 601 if ((cpu->cfg.ext_zcf \|\| cpu->cfg.ext_zcd \|\| cpu->cfg.ext_zcb \|\| in riscv_cpu_validate_set_extensions() 602 cpu->cfg.ext_zcmp \|\| cpu->cfg.ext_zcmt) && !cpu->cfg.ext_zca) { in riscv_cpu_validate_set_extensions() 608 if (cpu->cfg.ext_zcd && (cpu->cfg.ext_zcmp \|\| cpu->cfg.ext_zcmt)) { in riscv_cpu_validate_set_extensions() 614 if (cpu->cfg.ext_zcmt && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions() 665 if ((cpu->cfg.ext_zvbb \|\| cpu->cfg.ext_zvkb \|\| cpu->cfg.ext_zvkg \|\| in riscv_cpu_validate_set_extensions() 666 cpu->cfg.ext_zvkned \|\| cpu->cfg.ext_zvknha \|\| cpu->cfg.ext_zvksed \|\| in riscv_cpu_validate_set_extensions() 673 if ((cpu->cfg.ext_zvbc \|\| cpu->cfg.ext_zvknhb) && !cpu->cfg.ext_zve64f) { in riscv_cpu_validate_set_extensions() 711 if (cpu->cfg.ext_zihpm && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions() [all …]
/qemu/
H A D	cpu-common.c	`84 void cpu_list_add(CPUState cpu) in cpu_list_add() argument 112 CPUState cpu; in qemu_get_cpu() local 114 CPU_FOREACH(cpu) { in qemu_get_cpu() 116 return cpu; in qemu_get_cpu() 140 qemu_cpu_kick(cpu); in queue_work_on_cpu() 148 if (qemu_cpu_is_self(cpu)) { in do_run_on_cpu() 149 func(cpu, data); in do_run_on_cpu() 159 queue_work_on_cpu(cpu, &wi); in do_run_on_cpu() 177 queue_work_on_cpu(cpu, wi); in async_run_on_cpu() 268 if (!cpu->has_waiter) { in cpu_exec_start() [all …]`
/qemu/hw/intc/
H A D	arm_gic.c	145 int cpu_iface = virt ? (cpu + GIC_NCPU) : cpu; in gic_irq_signaling_enabled() 174 for (cpu = 0; cpu < s->num_cpu; cpu++) { in gic_update_internal() 175 cpu_iface = virt ? (cpu + GIC_NCPU) : cpu; in gic_update_internal() 335 int cpu = 0; in gic_update_maintenance() local 338 for (cpu = 0; cpu < s->num_cpu; cpu++) { in gic_update_maintenance() 398 int cpu; in gic_set_irq() local 520 uint32_t apr = s->apr[i][cpu] \| s->nsapr[i][cpu]; in gic_get_prio_from_apr_bits() 709 s->priority_mask[cpu] = pmask & gic_fullprio_mask(s, cpu); in gic_set_priority_mask() 833 if (gic_is_vcpu(cpu) && !gic_virq_is_valid(s, irq, cpu)) { in gic_deactivate_irq() 950 int cpu; in gic_dist_readb() local [all …]
/qemu/target/microblaze/
H A D	cpu.c	85 cpu->env.pc = value; in mb_cpu_set_pc() 87 cpu->env.iflags = 0; in mb_cpu_set_pc() 94 return cpu->env.pc; in mb_cpu_get_pc() 103 cpu->env.pc = tb->pc; in mb_cpu_synchronize_from_tb() 113 cpu->env.pc = data[0]; in mb_restore_state_to_opc() 235 if (cpu->cfg.addr_size < 32 \|\| cpu->cfg.addr_size > 64) { in mb_cpu_realizefn() 243 version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION; in mb_cpu_realizefn() 270 cpu->cfg.pvr_regs[1] = cpu->cfg.pvr_user2; in mb_cpu_realizefn() 300 cpu->cfg.pvr_regs[11] = ((cpu->cfg.use_mmu ? PVR11_USE_MMU : 0) \| in mb_cpu_realizefn() 303 cpu->cfg.mmu = 3; in mb_cpu_realizefn() [all …]
/qemu/include/hw/core/
H A D	cpu.h	`153 bool (has_work)(CPUState cpu); 161 vaddr (get_pc)(CPUState cpu); 579 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node) argument 580 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus_queue, node) argument 743 void cpu_list_add(CPUState cpu); 755 void cpu_reset(CPUState cpu); 816 return cc->has_work(cpu); in cpu_has_work() 957 cc->set_pc(cpu, addr); in cpu_set_pc() 975 void cpu_exit(CPUState cpu); 983 void cpu_resume(CPUState cpu); [all …]`
/qemu/target/s390x/
H A D	cpu-sysemu.c	45 S390CPU cpu = S390_CPU(s); in s390_cpu_load_normal() local 69 S390CPU cpu = opaque; in s390_cpu_machine_reset_cb() local 118 cpu->env.tod_timer = in s390_cpu_init_sysemu() 120 cpu->env.cpu_timer = in s390_cpu_init_sysemu() 145 CPU(cpu)->cpu_index = cpu->env.core_id; in s390_cpu_realize_sysemu() 157 g_free(cpu->irqstate); in s390_cpu_finalize() 177 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & in disabled_wait() 183 CPUState cpu; in s390_count_running_cpus() local 186 CPU_FOREACH(cpu) { in s390_count_running_cpus() 201 CPUState cs = CPU(cpu); in s390_cpu_halt() [all …]
/qemu/hw/openrisc/
H A D	cputimer.c	52 if (!cpu->env.is_counting) { in cpu_openrisc_count_update() 67 if (!cpu->env.is_counting) { in cpu_openrisc_timer_update() 86 cpu->env.is_counting = 1; in cpu_openrisc_count_start() 92 timer_del(cpu->env.timer); in cpu_openrisc_count_stop() 94 cpu->env.is_counting = 0; in cpu_openrisc_count_stop() 99 OpenRISCCPU cpu = opaque; in openrisc_timer_cb() local 123 qemu_cpu_kick(CPU(cpu)); in openrisc_timer_cb() 129 OpenRISCCPU cpu = opaque; in openrisc_count_reset() local 131 if (cpu->env.is_counting) { in openrisc_count_reset() 134 cpu->env.ttmr = 0x00000000; in openrisc_count_reset() [all …]

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