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/qemu/docs/specs/
H A Dppc-spapr-numa.rst56 ibm,associativity-reference-points represents an 1 based ordinal index (i.e.
177 the machine itself, e.g. NVLink 2 GPUs). The now legacy support has been
207 NUMA topology in the guest, e.g. this user input:
310 between 2 and 3 is 20, i.e. a match in 0x3:
386 * local distance, i.e. the distance of the resource to its own NUMA node: 10
H A Dpvpanic.rst6 management apps (e.g. libvirt) to be notified and respond to the event.
H A Drocker.txt539 software that Tx is complete and software resources (e.g. skb) backing packet
H A Dsev-guest-firmware.rst66 | | | 00f771de-1a7e-4fcb-890e-68c77e2fb44e |
88 Entry GUID: 00f771de-1a7e-4fcb-890e-68c77e2fb44e
H A Dtpm.rst94 e.g. SeaBIOS, a TCPA table is implemented. This table provides a 64kb
217 using the device, e.g., /dev/tpm0, before trying to start QEMU with
228 firmware, certain commands, e.g. ``TPM_Startup()``, sent by the
H A Dvmgenid.rst15 This allows management applications (e.g. libvirt) to notify the guest
17 configuration (e.g. snapshot execution or creation from a template). The
H A Dvmw_pvscsi-spec.rst88 e. Issue ``PVSCSI_CMD_SETUP_MSG_RING`` command again, provide
/qemu/docs/sphinx/
H A Dkerneldoc.py151 except Exception as e: # pylint: disable=W0703
153 (" ".join(cmd), str(e)))
/qemu/docs/system/arm/
H A Dcpu-features.rst14 command line, i.e. ``-cpu cortex-a15,pmu=off``.
112 It's possible for features to have dependencies on other features. I.e.
126 that do work, e.g. using the named CPU model ``cortex-a57`` with KVM on a
313 explicitly disabled (i.e. avoiding the error specified in (3) of
H A Dmps2.rst63 (i.e. to expect the interrupt vector base at 0 from reset).
H A Dsbsa.rst39 (i.e. CPUs and memory). As a result it must have a firmware specifically built
H A Dvirt.rst72 Also, please note that passing ``max`` CPU (i.e. ``-cpu max``) won't
75 wider system (e.g. the MTE feature), it may not be enabled by default,
79 as well as by selecting an MTE-capable CPU (e.g., ``max``) with the
113 bigger than 32 bits (i.e. 64-bit CPUs, and 32-bit CPUs with the
/qemu/docs/system/devices/
H A Dcan.rst137 if [ -e $ifc/device/vendor ] ; then
144 if [ -e $ifc/device/device ] ; then
H A Dcanokey.rst41 * For developers on software with secure key support (e.g. FIDO2, OpenPGP),
H A Dccid.rst24 reader and smart card (i.e. not backed by a physical device) using this device.
122 …vscclient -e "db=\"sql:$PWD\" use_hw=no soft=(,Test,CAC,,id-cert,signing-cert,encryption-cert)" <q…
H A Dcxl.rst201 | from host PA | | PCI 0e:00.0 | | PCI df:00.0| | PCI e0:00.0 |
286 | Switch BUS appears as 0e |
H A Dnet.rst6 QEMU can simulate several network cards (e.g. PCI or ISA cards on the PC
9 connect the NIC of the guest to a real network (e.g. by using a TAP
11 guest instances running in another QEMU process (e.g. by using the
89 connects the given device to the emulated hub with ID 0 (i.e. the
H A Dnvme.rst161 Buffer support (i.e, the CMB is initially disabled and must be explicitly
252 The ``RUHLIST`` is a semicolon separated list (i.e. ``0;1;2;3``) and may
253 include ranges (i.e. ``0;8-15``). If no reclaim unit handle list is specified,
H A Dusb.rst153 i.e. for three devices you must use 0+1+2. The 0+1+5 numbering from the
269 it. USB devices requiring real time streaming (i.e. USB Video Cameras)
H A Dvirtio-pmem.rst8 on regular (i.e non-NVDIMM) storage.
20 NVDIMM emulation on regular (i.e. non-NVDIMM) host storage does not
H A Dvirtio-snd.rst44 machine, e.g.:
/qemu/docs/system/
H A Dgdb.rst143 port (e.g. when running automated tests).
240 clients can connect to it, e.g., by using a unix socket with proper
/qemu/docs/system/i386/
H A Dhyperv.rst23 QEMU, individual enlightenments can be enabled through CPU flags, e.g:
59 Virtual Processor indices (e.g. when VP index needs to be passed in a
165 Note: some virtualization features (e.g. Posted Interrupts) are disabled when
263 In some cases (e.g. during development) it may make sense to use QEMU in
H A Dkvm-pv.rst25 irqchip (e.g. "-machine ...,kernel-irqchip=split -cpu ...,x2apic").
H A Dsgx.rst29 By default, QEMU does not assign EPC to a VM, i.e. fully enabling SGX in a VM
31 memory types, e.g. hugetlbfs, EPC is exposed as a memory backend.
33 SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be realized
39 guest, e.g. QEMU will happily allow you to create 64 1M EPC sections. Be aware
40 that some kernels may not recognize all EPC sections, e.g. the Linux SGX driver
55 a subset of the full EPC, e.g. 92M or 128M) and the EPC must be naturally
82 e.g. via ``-cpu <model>,+sgx`` or ``-cpu <model>,+sgx,+sgxlc``.
84 All SGX sub-features enumerated through CPUID, e.g. SGX2, MISCSELECT,
87 i.e. may marginally reduce SGX performance in the guest. All SGX sub-features
88 controlled via -cpu are prefixed with "sgx", e.g.::
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