Searched refs:i (Results 176 – 200 of 2243) sorted by path
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/qemu/docs/devel/ |
H A D | writing-monitor-commands.rst | 190 for (int i = 0; i < times; i++) { 433 for (int i = 0; i < nb_option_roms; i++) { 435 info->filename = g_strdup(option_rom[i].name); 436 info->has_bootindex = option_rom[i].bootindex >= 0; 438 info->bootindex = option_rom[i].bootindex;
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/qemu/docs/interop/ |
H A D | barrier.rst | 124 (i.e. has sent a barrierCmdCClipboard for and has not received a
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H A D | firmware.json | 380 # locations, then sort the list by filename (i.e., last pathname
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H A D | live-block-operations.rst | 92 (c) the streamed file remains valid -- i.e. further 100 (i.e. merge the current active layer into the base image). 113 intermediate images will be rendered invalid -- i.e. 180 overlay images; image [D] is the active layer -- i.e. live QEMU is 332 commit" (i.e. it is possible to merge the "active layer", the right-most 544 ``BLOCK_JOB_COMPLETED``) will adjust the guest device (i.e. live 669 contents of the *top*-most disk image (i.e. the active layer), [D], to a 1108 point-in-time backup of the disk image chain -- i.e. contents from
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H A D | pr-helper.rst | 71 and only if the SCSI status is 0x00, i.e. GOOD)
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H A D | qcow2.txt | 39 Must not be less than 9 (i.e. 512 byte clusters). 46 must be at least 14 (i.e. 16384 byte clusters). 178 (i.e. refcount_bits = 16). 179 This value may not exceed 6 (i.e. refcount_bits = 64). 237 paragraph, i.e. in the same manner as when this field is not present. 638 one (i.e. bit x is used for subcluster x). 648 one (i.e. bit x is used for subcluster x - 32). 698 regular guest cluster (i.e. VM state is stored like guest
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H A D | vhost-user.json | 202 # locations, then sort the list by filename (i.e., basename
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H A D | vhost-user.rst | 38 The *front-end* and *back-end* can be either a client (i.e. connecting) or 239 logging starts (i.e. where guest address 0 would be 453 * started and enabled: The back-end must process the ring normally, i.e. 563 (i.e. does not have to be covered by the ``VhostUserMemory`` table), but 809 #. Get the next available head-descriptor index from available ring, ``i`` 811 #. Set ``desc[i].counter`` to the value of global counter 815 #. Set ``desc[i].inflight`` to 1 819 1. Get corresponding used head-descriptor index, i 821 2. Set ``desc[i].next`` to ``last_batch_head`` 823 3. Set ``last_batch_head`` to ``i`` [all …]
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/qemu/docs/ |
H A D | multiseat.txt | 87 fully updated for the new kernel though, i.e. the live iso doesn't cut
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H A D | nvdimm.txt | 14 backend (i.e. memory-backend-file and memory-backend-ram). A simple 127 enough number of slots, i.e. 132 2. The similar is required for the memory option "-m ...,maxmem=M", i.e. 178 If these conditions are not satisfied i.e. if either 'pmem' or 'share'
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H A D | qcow2-cache.txt | 237 i.e.
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H A D | rdma.txt | 291 negotiation. (i.e. There is only one version number that is referred to
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/qemu/docs/specs/ |
H A D | fw_cfg.rst | 225 with the current selector (i.e., the item cannot be resized). Truncated writes 247 Since v2.4, "file" fw_cfg items (i.e., items with selector keys above
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H A D | pci-ids.rst | 45 official ID when the code leaves the test lab (i.e. when seeking
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H A D | ppc-spapr-hcalls.rst | 50 disabled, i.e. guest effective address equals to guest physical address), it
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H A D | ppc-spapr-numa.rst | 56 ibm,associativity-reference-points represents an 1 based ordinal index (i.e. 310 between 2 and 3 is 20, i.e. a match in 0x3: 386 * local distance, i.e. the distance of the resource to its own NUMA node: 10
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H A D | tpm.rst | 263 # dmesg | grep -i tpm 392 # dmesg | grep -i tpm
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/qemu/docs/spin/ |
H A D | tcg-exclusive.promela | 89 i = 0; \ 91 :: i < N_CPUS -> { \ 93 :: running[i] -> has_waiter[i] = 1; pending_cpus++; \ 96 i++; \ 206 byte i;
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/qemu/docs/system/arm/ |
H A D | cpu-features.rst | 14 command line, i.e. ``-cpu cortex-a15,pmu=off``. 313 explicitly disabled (i.e. avoiding the error specified in (3) of
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H A D | imx25-pdk.rst | 1 NXP i.MX25 PDK board (``imx25-pdk``) 4 The ``imx25-pdk`` board emulates the NXP i.MX25 Product Development Kit 5 board, which is based on an i.MX25 SoC which uses an ARM926 CPU.
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H A D | kzm.rst | 5 evaluation board, which is based on an NXP i.MX32 SoC
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H A D | mps2.rst | 63 (i.e. to expect the interrupt vector base at 0 from reset).
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H A D | sabrelite.rst | 4 Boundary Devices SABRE Lite i.MX6 Development Board is a low-cost development 5 platform featuring the powerful Freescale / NXP Semiconductor's i.MX 6 Quad
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H A D | sbsa.rst | 39 (i.e. CPUs and memory). As a result it must have a firmware specifically built
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H A D | virt.rst | 72 Also, please note that passing ``max`` CPU (i.e. ``-cpu max``) won't 113 bigger than 32 bits (i.e. 64-bit CPUs, and 32-bit CPUs with the
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