/dports/emulators/simh/simh-3.9.0_5/SDS/ |
H A D | sds_cpu.c | 784 case BRU: in one_inst()
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H A D | sds_defs.h | 393 HLT, BRU, EOM, EOD = 006, enumerator
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H A D | sds_sys.c | 241 if (I_GETOP (buf[6]) == BRU) in sim_load()
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/dports/www/grafana8/grafana-8.3.6/public/gazetteer/ |
H A D | airports.geojson | 1 …":{"type":"major","name":"Brussels","abbrev":"BRU","location":"terminal","gps_code":"EBBR","iata_c…
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/dports/www/flexget/Flexget-3.2.18/flexget/tests/cassettes/ |
H A D | test_imdb.TestImdb.test_lookup | 1276 KsZGP0ccHa/HuxOHZcN+A3FuofkAqQAK2YJgVsYKg1wHuNmrFxEHAxX602UwS3B/SfDMB82w/BRU
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
H A D | PPCScheduleP8.td | 27 // 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). 394 // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.td | 2387 def BRU : MnemonicAlias<"bru", "j">;
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedTSV110.td | 36 def TSV110UnitAB : ProcResource<2>; // Int ALU/BRU
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/PowerPC/ |
H A D | PPCScheduleP8.td | 27 // 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). 394 // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64SchedTSV110.td | 36 def TSV110UnitAB : ProcResource<2>; // Int ALU/BRU
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.td | 2387 def BRU : MnemonicAlias<"bru", "j">;
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
H A D | PPCScheduleP8.td | 27 // 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). 394 // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.td | 2387 def BRU : MnemonicAlias<"bru", "j">;
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedTSV110.td | 36 def TSV110UnitAB : ProcResource<2>; // Int ALU/BRU
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.td | 2387 def BRU : MnemonicAlias<"bru", "j">;
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedTSV110.td | 36 def TSV110UnitAB : ProcResource<2>; // Int ALU/BRU
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
H A D | PPCScheduleP8.td | 27 // 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). 394 // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
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/dports/www/nextcloud-calendar/calendar/js/ |
H A D | calendar-appointments-conflict.js.map | 1 …E,KAARhP,IAEFgP,GADAhP,GAAO,KAILtnB,IACFs2B,GAAQt2B,EAAO,KAGjBs2B,GAAQV,IA/BRU,EAAO98B,GAAGi9B,aAA…
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H A D | calendar-appointments-confirmation.js.map | 1 …E,KAARhP,IAEFgP,GADAhP,GAAO,KAILtnB,IACFs2B,GAAQt2B,EAAO,KAGjBs2B,GAAQV,IA/BRU,EAAO98B,GAAGi9B,aAA…
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/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/PPC/ |
H A D | PPCScheduleP8.td | 28 // 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). 387 // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
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/dports/devel/liblouis/liblouis-3.20.0/tests/braille-specs/ |
H A D | de-g2-dictionary.yaml | 1364 - [brust, 'BRU]'] 1365 - [brustamputationen, 'BRU]AMPUT!NC'] 1366 - [brustbeerbaums, 'BRU]BEERB1MS'] 1367 - [brustimplantate, 'BRU]IMPL+TA('] 1370 - [bruyèremaserung, BRU'Y"EREMAS7U]
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H A D | de-g1-dictionary.yaml | 1393 - [brustschnüren, 'BRU]5N8REN'] 1394 - [bruststerne, 'BRU]]ERNE']
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/mips/ |
H A D | sr71k.md | 73 ;; Branch on floating condition go to BRU.
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/rs6000/ |
H A D | power9.md | 481 ; Move from LR/CTR are executed in BRU but consume a writeback port from an
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H A D | cell.md | 50 ;; BRU unit: bru(none register stall), bru_cr(cr register stall)
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