/qemu/hw/virtio/ |
H A D | virtio-mmio.c | 182 HWADDR_PRIx ") in non-legacy mode\n", in virtio_mmio_read() 192 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_read() 205 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_read() 335 HWADDR_PRIx ") in non-legacy mode\n", in virtio_mmio_write() 390 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_write() 443 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_write() 453 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_write() 463 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_write() 473 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_write() 483 HWADDR_PRIx ") in legacy mode\n", in virtio_mmio_write() [all …]
|
/qemu/hw/misc/ |
H A D | arm_integrator_debug.c | 40 "%s: returning zero from %" HWADDR_PRIx ":%u\n", in intdbg_control_read() 45 "%s: Bad offset %" HWADDR_PRIx, in intdbg_control_read() 61 " to %" HWADDR_PRIx ":%u\n", in intdbg_control_write() 67 " to bad offset %" HWADDR_PRIx "\n", in intdbg_control_write()
|
H A D | stm32f2xx_syscfg.c | 60 DB_PRINT("0x%"HWADDR_PRIx"\n", addr); in stm32f2xx_syscfg_read() 79 "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); in stm32f2xx_syscfg_read() 92 DB_PRINT("0x%x, 0x%"HWADDR_PRIx"\n", value, addr); in stm32f2xx_syscfg_write() 122 "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); in stm32f2xx_syscfg_write()
|
H A D | mchp_pfsoc_dmc.c | 79 "(size %d, offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_ddr_sgmii_phy_read() 92 ", offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_ddr_sgmii_phy_write() 161 "(size %d, offset 0x%" HWADDR_PRIx ")\n", in type_init() 174 ", offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_ddr_cfg_write()
|
H A D | mchp_pfsoc_ioscb.c | 71 "(size %d, offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_dummy_read() 82 ", offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_dummy_write() 108 "(size %d, offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_pll_read() 138 "(size %d, offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_io_calib_ddr_read() 174 "(size %d, offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_ctrl_read() 193 ", offset 0x%" HWADDR_PRIx ")\n", in mchp_pfsoc_ctrl_write()
|
H A D | bcm2835_powermgt.c | 46 "bcm2835_powermgt_read: Unknown offset 0x%08"HWADDR_PRIx in bcm2835_powermgt_read() 63 " at offset 0x%08"HWADDR_PRIx"\n", in bcm2835_powermgt_write() 94 "bcm2835_powermgt_write: Unknown offset 0x%08"HWADDR_PRIx in bcm2835_powermgt_write()
|
H A D | npcm7xx_rng.c | 82 "%s: read from invalid offset 0x%" HWADDR_PRIx "\n", in npcm7xx_rng_read() 106 "%s: write to read-only register @ 0x%" HWADDR_PRIx "\n", in npcm7xx_rng_write() 114 "%s: write to invalid offset 0x%" HWADDR_PRIx "\n", in npcm7xx_rng_write()
|
H A D | aspeed_scu.c | 254 "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n", in aspeed_scu_read() 268 "%s: Read of write-only offset 0x%" HWADDR_PRIx "\n", in aspeed_scu_read() 285 "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2400_scu_write() 308 "%s: Write to read-only offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2400_scu_write() 324 "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2500_scu_write() 355 "%s: Write to read-only offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2500_scu_write() 619 "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2600_scu_read() 655 "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2600_scu_write() 703 "%s: Write to read-only offset 0x%" HWADDR_PRIx "\n", in aspeed_ast2600_scu_write()
|
H A D | aspeed_sbc.c | 52 "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n", in aspeed_sbc_read() 69 "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", in aspeed_sbc_write() 78 "%s: write to read only register 0x%" HWADDR_PRIx "\n", in aspeed_sbc_write()
|
/qemu/hw/ssi/ |
H A D | stm32f2xx_spi.c | 73 DB_PRINT("Address: 0x%" HWADDR_PRIx "\n", addr); in stm32f2xx_spi_read() 109 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n", in stm32f2xx_spi_read() 122 DB_PRINT("Address: 0x%" HWADDR_PRIx ", Value: 0x%x\n", addr, value); in stm32f2xx_spi_write() 147 "0x%" HWADDR_PRIx "\n", __func__, addr); in stm32f2xx_spi_write() 151 "0x%" HWADDR_PRIx "\n", __func__, addr); in stm32f2xx_spi_write() 163 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in stm32f2xx_spi_write()
|
/qemu/hw/watchdog/ |
H A D | wdt_aspeed.c | 80 HWADDR_PRIx "\n", __func__, offset); in aspeed_wdt_read() 95 "%s: uninmplemented read at offset 0x%" HWADDR_PRIx "\n", in aspeed_wdt_read() 100 "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n", in aspeed_wdt_read() 162 HWADDR_PRIx "\n", __func__, offset); in aspeed_wdt_write() 206 "%s: uninmplemented write at offset 0x%" HWADDR_PRIx "\n", in aspeed_wdt_write() 211 "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", in aspeed_wdt_write() 263 qemu_log_mask(CPU_LOG_RESET, "Watchdog timer %" HWADDR_PRIx " expired.\n", in aspeed_wdt_timer_expired()
|
/qemu/hw/ppc/ |
H A D | pnv_homer.c | 153 HWADDR_PRIx "\n", addr >> 3); in pnv_homer_power8_pba_read() 162 HWADDR_PRIx "\n", addr >> 3); in pnv_homer_power8_pba_write() 296 HWADDR_PRIx "\n", addr >> 3); in pnv_homer_power9_pba_read() 305 HWADDR_PRIx "\n", addr >> 3); in pnv_homer_power9_pba_write() 359 HWADDR_PRIx "\n", addr >> 3); in pnv_homer_power10_pba_read() 368 HWADDR_PRIx "\n", addr >> 3); in pnv_homer_power10_pba_write()
|
H A D | pnv_occ.c | 76 HWADDR_PRIx "\n", addr >> 3); in pnv_occ_power8_xscom_read() 99 HWADDR_PRIx "\n", addr >> 3); in pnv_occ_power8_xscom_write() 198 HWADDR_PRIx "\n", addr >> 3); in pnv_occ_power9_xscom_read() 221 HWADDR_PRIx "\n", addr >> 3); in pnv_occ_power9_xscom_write()
|
/qemu/hw/gpio/ |
H A D | bcm2838_gpio.c | 190 " Address 0x%"HWADDR_PRIx", size %u\n", in bcm2838_gpio_read() 214 qemu_log_mask(LOG_UNIMP, "%s: %s: not implemented for %"HWADDR_PRIx"\n", in bcm2838_gpio_read() 225 qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: bad offset %"HWADDR_PRIx"\n", in bcm2838_gpio_read() 264 " Address 0x%"HWADDR_PRIx", size %u\n", in bcm2838_gpio_write() 282 qemu_log_mask(LOG_UNIMP, "%s: %s: not implemented for %"HWADDR_PRIx"\n", in bcm2838_gpio_write() 293 qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: bad offset %"HWADDR_PRIx"\n", in bcm2838_gpio_write()
|
/qemu/monitor/ |
H A D | hmp-cmds-target.c | 259 error_setg(errp, "No memory is mapped at address 0x%" HWADDR_PRIx, addr); in gpa2hva() 264 error_setg(errp, "Memory at address 0x%" HWADDR_PRIx " is not RAM", addr); in gpa2hva() 271 error_setg(errp, "Size of memory region at 0x%" HWADDR_PRIx in gpa2hva() 294 monitor_printf(mon, "Host virtual address for 0x%" HWADDR_PRIx in hmp_gpa2hva() 317 monitor_printf(mon, "gpa: %#" HWADDR_PRIx "\n", in hmp_gva2gpa() 374 monitor_printf(mon, "Host physical address for 0x%" HWADDR_PRIx in hmp_gpa2hpa()
|
/qemu/hw/m68k/ |
H A D | next-kbd.c | 88 qemu_log_mask(LOG_UNIMP, "NeXT kbd read byte %"HWADDR_PRIx"\n", addr); in kbd_read_byte() 96 qemu_log_mask(LOG_UNIMP, "NeXT kbd read word %"HWADDR_PRIx"\n", addr); in kbd_read_word() 135 qemu_log_mask(LOG_UNIMP, "NeXT kbd read long %"HWADDR_PRIx"\n", addr); in kbd_read_long() 157 qemu_log_mask(LOG_UNIMP, "NeXT kbd write: size=%u addr=0x%"HWADDR_PRIx in kbd_writefn()
|
/qemu/hw/char/ |
H A D | stm32f2xx_usart.c | 106 DB_PRINT("Read 0x%"HWADDR_PRIx"\n", addr); in stm32f2xx_usart_read() 132 "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); in stm32f2xx_usart_read() 146 DB_PRINT("Write 0x%" PRIx32 ", 0x%"HWADDR_PRIx"\n", value, addr); in stm32f2xx_usart_write() 192 "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); in stm32f2xx_usart_write()
|
/qemu/hw/i386/xen/ |
H A D | xen-hvm.c | 278 DPRINTF("mapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx"\n", in xen_add_to_physmap() 309 error_report("relocate_memory %lu pages from GFN %"HWADDR_PRIx in xen_add_to_physmap() 310 " to GFN %"HWADDR_PRIx" failed: %s", in xen_add_to_physmap() 345 DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", at " in xen_remove_from_physmap() 346 "%"HWADDR_PRIx"\n", start_addr, start_addr + size, phys_offset); in xen_remove_from_physmap() 357 " from GFN %"HWADDR_PRIx in xen_remove_from_physmap() 358 " to GFN %"HWADDR_PRIx" failed: %s", in xen_remove_from_physmap()
|
/qemu/hw/intc/ |
H A D | pnv_xive2.c | 253 xive2_error(xive, "VST: read failed at @0x%" HWADDR_PRIx in pnv_xive2_vst_read() 285 xive2_error(xive, "VST: write failed at @0x%" HWADDR_PRIx in pnv_xive2_vst_write() 802 xive2_error(xive, "CQ: invalid read @%"HWADDR_PRIx, offset); in pnv_xive2_ic_cq_read() 1056 xive2_error(xive, "VC: invalid read @%"HWADDR_PRIx, offset); in pnv_xive2_ic_vc_read() 1522 xive2_error(xive, "LSI: invalid read @%"HWADDR_PRIx, offset); in pnv_xive2_ic_lsi_read() 1531 xive2_error(xive, "LSI: invalid write @%"HWADDR_PRIx, offset); in pnv_xive2_ic_lsi_write() 1565 xive2_error(xive, "SYNC: invalid read @%"HWADDR_PRIx, offset); in pnv_xive2_ic_sync_read() 1736 xive2_error(xive, "NVC: invalid read @%"HWADDR_PRIx, offset); in pnv_xive2_nvc_read() 1745 xive2_error(xive, "NVC: invalid write @%"HWADDR_PRIx, offset); in pnv_xive2_nvc_write() 1767 xive2_error(xive, "NVPG: invalid read @%"HWADDR_PRIx, offset); in pnv_xive2_nvpg_read() [all …]
|
H A D | aspeed_vic.c | 168 HWADDR_PRIx "\n", __func__, offset); in aspeed_vic_read() 173 "%s: Bad register at offset 0x%" HWADDR_PRIx "\n", in aspeed_vic_read() 273 HWADDR_PRIx "\n", __func__, offset); in aspeed_vic_write() 278 "%s: Bad register at offset 0x%" HWADDR_PRIx "\n", in aspeed_vic_write()
|
H A D | imx_avic.c | 113 DPRINTF("read(offset = 0x%" HWADDR_PRIx ")\n", offset); in imx_avic_read() 212 HWADDR_PRIx "\n", TYPE_IMX_AVIC, __func__, offset); in imx_avic_read() 229 DPRINTF("(0x%" HWADDR_PRIx ") = 0x%x\n", offset, (unsigned int)val); in imx_avic_write() 305 HWADDR_PRIx "\n", TYPE_IMX_AVIC, __func__, offset); in imx_avic_write()
|
/qemu/hw/nvram/ |
H A D | nrf51_nvm.c | 211 "%s: bad read offset 0x%" HWADDR_PRIx "\n", __func__, offset); in io_read() 239 "%s: Flash erase at 0x%" HWADDR_PRIx" while flash not erasable.\n", in io_write() 263 "%s: bad write offset 0x%" HWADDR_PRIx "\n", __func__, offset); in io_write() 303 "%s: Flash write 0x%" HWADDR_PRIx" while flash not writable.\n", in flash_write()
|
/qemu/hw/adc/ |
H A D | stm32f2xx_adc.c | 105 DB_PRINT("Address: 0x%" HWADDR_PRIx "\n", addr); in stm32f2xx_adc_read() 164 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in stm32f2xx_adc_read() 176 DB_PRINT("Address: 0x%" HWADDR_PRIx ", Value: 0x%x\n", in stm32f2xx_adc_write() 241 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in stm32f2xx_adc_write()
|
/qemu/hw/timer/ |
H A D | sh_timer.c | 79 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n", in sh_timer_read() 200 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, offset); in sh_timer_write() 271 "%s: Bad channel offset 0x%" HWADDR_PRIx "\n", in tmu012_read() 291 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, offset); in tmu012_read() 304 "%s: Bad channel offset 0x%" HWADDR_PRIx "\n", in tmu012_write()
|
/qemu/hw/i2c/ |
H A D | imx_i2c.c | 150 HWADDR_PRIx "\n", TYPE_IMX_I2C, __func__, offset); in imx_i2c_read() 155 DPRINTF("read %s [0x%" HWADDR_PRIx "] -> 0x%02x\n", in imx_i2c_read() 166 DPRINTF("write %s [0x%" HWADDR_PRIx "] <- 0x%02x\n", in imx_i2c_write() 271 HWADDR_PRIx "\n", TYPE_IMX_I2C, __func__, offset); in imx_i2c_write()
|