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Searched refs:KSEG2 (Results 1 – 25 of 80) sorted by path

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/dports/devel/openocd/openocd-0.11.0/src/target/
H A Dmips32.h39 #define KSEG2 0xc0000000 macro
H A Dmips32_pracc.c807 case KSEG2: in mips32_pracc_write_mem()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
98 #define KSEG2 0xc0000000 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/emulators/vmips/vmips-1.5.1/
H A Dcpzero.cc139 case KSEG2: in address_trans()
141 return tlb_translate(KSEG2, vaddr, mode, cacheable, client); in address_trans()
H A Dcpzeroreg.h38 #define KSEG2 0xc0000000 /* beginning of mapped cached kernel segment */ macro
/dports/emulators/vmips/vmips-1.5.1/doc/
H A Dvmips.info2315 * Address translations in KSEG0 or KSEG2 or KUSEG or User mode.
H A Dvmips.texi1834 @item Address translations in KSEG0 or KSEG2 or KUSEG or User mode.
/dports/emulators/vmips/vmips-1.5.1/test_code/
H A DREADME119 * Address translations in KSEG0 or KSEG2 or KUSEG or User mode.
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/include/asm/
H A Daddrspace.h82 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
90 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
100 #define KSEG2 0xc0000000 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/include/asm/
H A Daddrspace.h82 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
90 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
100 #define KSEG2 0xc0000000 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/include/asm/
H A Daddrspace.h82 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
90 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
100 #define KSEG2 0xc0000000 macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
97 #define KSEG2 0xc0000000 macro

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