Home
last modified time | relevance | path

Searched refs:SUB (Results 1 – 12 of 12) sorted by last modified time

/qemu/target/sparc/
H A Dtranslate.c3330 TRANS(SUB, ALL, do_arith, a, tcg_gen_sub_tl, tcg_gen_subi_tl, gen_op_subcc) in TRANS()
H A Dinsns.decode173 SUB 10 ..... 0.0100 ..... . ............. @r_r_ri_cc
/qemu/target/arm/tcg/
H A Dtranslate.c5465 DO_ANY3(SUB, a->s ? gen_sub_CC : tcg_gen_sub_i32, false, in DO_CMP2()
H A Dmve_helper.c1833 #define DO_LDAVH(OP, TYPE, LTYPE, XCHG, SUB) \ argument
1845 if (SUB) { \
/qemu/target/i386/tcg/
H A Ddecode-new.c.inc1521 [0x28] = X86_OP_ENTRY2(SUB, E,b, G,b, lock),
1522 [0x29] = X86_OP_ENTRY2(SUB, E,v, G,v, lock),
1523 [0x2A] = X86_OP_ENTRY2(SUB, G,b, E,b, lock),
1524 [0x2B] = X86_OP_ENTRY2(SUB, G,v, E,v, lock),
1525 [0x2C] = X86_OP_ENTRY2(SUB, 0,b, I,b, lock), /* AL, Ib */
1530 [0x38] = X86_OP_ENTRYrr(SUB, E,b, G,b),
1531 [0x39] = X86_OP_ENTRYrr(SUB, E,v, G,v),
1532 [0x3A] = X86_OP_ENTRYrr(SUB, G,b, E,b),
1533 [0x3B] = X86_OP_ENTRYrr(SUB, G,v, E,v),
1534 [0x3C] = X86_OP_ENTRYrr(SUB, 0,b, I,b), /* AL, Ib */
[all …]
/qemu/disas/
H A Dnanomips.c14408 static char *SUB(uint64 instruction, Dis_info *info) in SUB() function
16450 0xfc0003ff, 0x20000190, &SUB , 0,
/qemu/tcg/aarch64/
H A Dtcg-target.c.inc2199 tcg_out_insn(s, 3502, SUB, ext, a0, a1, a2);
2205 tcg_out_insn(s, 3502, SUB, ext, a0, TCG_REG_XZR, a1);
2345 tcg_out_insn(s, 3502, SUB, 0, TCG_REG_TMP0, TCG_REG_XZR, a2);
2577 tcg_out_insn(s, 3611, SUB, vece, a0, a1, a2);
2579 tcg_out_insn(s, 3616, SUB, is_q, vece, a0, a1, a2);
/qemu/target/mips/tcg/
H A Dmicromips_translate.c.inc169 SUB = 0x6,
1687 case SUB:
2231 FINSN_3ARG_SDPS(SUB);
/qemu/tests/tcg/i386/
H A Dx86.csv2014 "SUB AL, imm8","SUBB imm8, AL","subb imm8, AL","2C ib","V","V","","","rw,r","Y","8"
2015 "SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","80 /5 ib","V","V","","","rw,r","Y","8"
2016 "SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","82 /5 ib","V","N.S.","","","rw,r","Y","8"
2018 "SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","2A /r","V","V","","","rw,r","Y","8"
2019 "SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","REX 2A /r","N.E.","V","","pseudo64","rw,r","Y","8"
2020 "SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","28 /r","V","V","","","rw,r","Y","8"
2021 "SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","REX 28 /r","N.E.","V","","pseudo64","rw,r","Y","8"
2022 "SUB EAX, imm32","SUBL imm32, EAX","subl imm32, EAX","2D id","V","V","","operand32","rw,r","Y","32"
2025 "SUB r32, r/m32","SUBL r/m32, r32","subl r/m32, r32","2B /r","V","V","","operand32","rw,r","Y","32"
2026 "SUB r/m32, r32","SUBL r32, r/m32","subl r32, r/m32","29 /r","V","V","","operand32","rw,r","Y","32"
[all …]
/qemu/target/rx/
H A Dinsns.decode572 # SUB #uimm4, rd
574 # SUB dsp[rs].ub, rd
575 # SUB rs, rd
577 # SUB dsp[rs], rd
579 # SUB rs, rs2, rd
/qemu/target/avr/
H A Dinsn.decode56 SUB 0001 10 . ..... .... @op_rd_rr
H A Ddisas.c136 INSN(SUB, "r%d, r%d", a->rd, a->rr)