/dports/sysutils/fdupes/fdupes-2.1.2/md5/ |
H A D | md5.c | 181 #define T63 0x2ad7d2bb macro 329 SET(c, d, a, b, 2, 15, T63); in md5_process()
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/dports/audio/ocp/ocp-0.2.90/playsid/libsidplayfp-git/src/utils/MD5/ |
H A D | MD5.cpp | 148 #define T63 0x2ad7d2bb macro 287 SET(&MD5::I, c, d, a, b, 2, 15, T63); in process()
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/dports/editors/libreoffice/libreoffice-7.2.6.2/writerperfect/qa/unit/data/writer/libmwaw/pass/ |
H A D | DOCMaker_4.hqx | 797 $,`-[#Mmm!!QS25!I,`#SDc!I-Lm!(T*!2d%!(M![!$T63'F'8d"R#Q!1,fm!(J! 928 kqVKJ'$!["'"63'F+98"R"P9!C`*J"Mmm!!'Tb%S&C`$q6M!["&T63'F+8d"R5&0 1099 63'F!!)T63'F!!A"63'F!!C4J!!)H$%-!!f`16VVr2%kj!!!$J'!!!JS[,Icm2`0
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/clang/test/CodeGen/X86/ |
H A D | x86_32-arguments-darwin.c | 310 typedef int T63 __attribute((vector_size(16))); 311 struct s63 { T63 x; int y; };
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | load-constant-i16.ll | 3454 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T49.X, 0 3603 ; EG-NEXT: LSHR T63.W, T49.Y, literal.y, 3607 ; EG-NEXT: AND_INT T63.Z, T49.Y, literal.x, 3611 ; EG-NEXT: LSHR T63.Y, T49.X, literal.y, 3613 ; EG-NEXT: AND_INT * T63.X, T49.X, literal.z, 4190 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T52.X, 0 4324 ; EG-NEXT: BFE_INT T63.Z, T46.W, 0.0, literal.x, 4328 ; EG-NEXT: BFE_INT T63.X, T46.Z, 0.0, literal.x, 4337 ; EG-NEXT: BFE_INT T63.W, T2.Y, 0.0, literal.x, 4341 ; EG-NEXT: BFE_INT T63.Y, PS, 0.0, literal.x,
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H A D | load-global-i16.ll | 4065 ; EG-NEXT: LSHR T63.W, T49.W, literal.y, 4069 ; EG-NEXT: AND_INT T63.Z, T49.W, literal.x, 4073 ; EG-NEXT: LSHR T63.Y, T49.Z, literal.y, 4075 ; EG-NEXT: AND_INT * T63.X, T49.Z, literal.z, 4238 ; CM-NEXT: LSHR * T63.W, T48.Y, literal.y, 4241 ; CM-NEXT: AND_INT T63.Z, T48.Y, literal.x, 4245 ; CM-NEXT: LSHR T63.Y, T48.X, literal.y, 4248 ; CM-NEXT: AND_INT T63.X, T48.X, literal.x, 4857 ; EG-NEXT: BFE_INT T63.Z, T47.W, 0.0, literal.x, 4861 ; EG-NEXT: BFE_INT T63.X, T47.Z, 0.0, literal.x, [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | load-constant-i16.ll | 3454 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T49.X, 0 3603 ; EG-NEXT: LSHR T63.W, T49.Y, literal.y, 3607 ; EG-NEXT: AND_INT T63.Z, T49.Y, literal.x, 3611 ; EG-NEXT: LSHR T63.Y, T49.X, literal.y, 3613 ; EG-NEXT: AND_INT * T63.X, T49.X, literal.z, 4190 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T52.X, 0 4324 ; EG-NEXT: BFE_INT T63.Z, T46.W, 0.0, literal.x, 4328 ; EG-NEXT: BFE_INT T63.X, T46.Z, 0.0, literal.x, 4337 ; EG-NEXT: BFE_INT T63.W, T2.Y, 0.0, literal.x, 4341 ; EG-NEXT: BFE_INT T63.Y, PS, 0.0, literal.x,
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H A D | load-global-i16.ll | 4065 ; EG-NEXT: LSHR T63.W, T49.W, literal.y, 4069 ; EG-NEXT: AND_INT T63.Z, T49.W, literal.x, 4073 ; EG-NEXT: LSHR T63.Y, T49.Z, literal.y, 4075 ; EG-NEXT: AND_INT * T63.X, T49.Z, literal.z, 4238 ; CM-NEXT: LSHR * T63.W, T48.Y, literal.y, 4241 ; CM-NEXT: AND_INT T63.Z, T48.Y, literal.x, 4245 ; CM-NEXT: LSHR T63.Y, T48.X, literal.y, 4248 ; CM-NEXT: AND_INT T63.X, T48.X, literal.x, 4857 ; EG-NEXT: BFE_INT T63.Z, T47.W, 0.0, literal.x, 4861 ; EG-NEXT: BFE_INT T63.X, T47.Z, 0.0, literal.x, [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/clang/test/CodeGen/X86/ |
H A D | x86_32-arguments-darwin.c | 310 typedef int T63 __attribute((vector_size(16))); 311 struct s63 { T63 x; int y; };
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/clang/test/CodeGen/X86/ |
H A D | x86_32-arguments-darwin.c | 310 typedef int T63 __attribute((vector_size(16))); 311 struct s63 { T63 x; int y; };
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/X86/ |
H A D | bad-reduction.ll | 393 ; CHECK-NEXT: [[T63:%.*]] = load i8, i8* [[T62]], align 1 409 ; CHECK-NEXT: [[T64:%.*]] = zext i8 [[T63]] to i32
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | load-constant-i16.ll | 3454 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T49.X, 0 3603 ; EG-NEXT: LSHR T63.W, T49.Y, literal.y, 3607 ; EG-NEXT: AND_INT T63.Z, T49.Y, literal.x, 3611 ; EG-NEXT: LSHR T63.Y, T49.X, literal.y, 3613 ; EG-NEXT: AND_INT * T63.X, T49.X, literal.z, 4190 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T52.X, 0 4324 ; EG-NEXT: BFE_INT T63.Z, T46.W, 0.0, literal.x, 4328 ; EG-NEXT: BFE_INT T63.X, T46.Z, 0.0, literal.x, 4337 ; EG-NEXT: BFE_INT T63.W, T2.Y, 0.0, literal.x, 4341 ; EG-NEXT: BFE_INT T63.Y, PS, 0.0, literal.x,
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H A D | load-global-i16.ll | 4065 ; EG-NEXT: LSHR T63.W, T49.W, literal.y, 4069 ; EG-NEXT: AND_INT T63.Z, T49.W, literal.x, 4073 ; EG-NEXT: LSHR T63.Y, T49.Z, literal.y, 4075 ; EG-NEXT: AND_INT * T63.X, T49.Z, literal.z, 4238 ; CM-NEXT: LSHR * T63.W, T48.Y, literal.y, 4241 ; CM-NEXT: AND_INT T63.Z, T48.Y, literal.x, 4245 ; CM-NEXT: LSHR T63.Y, T48.X, literal.y, 4248 ; CM-NEXT: AND_INT T63.X, T48.X, literal.x, 4857 ; EG-NEXT: BFE_INT T63.Z, T47.W, 0.0, literal.x, 4861 ; EG-NEXT: BFE_INT T63.X, T47.Z, 0.0, literal.x, [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/X86/ |
H A D | bad-reduction.ll | 393 ; CHECK-NEXT: [[T63:%.*]] = load i8, i8* [[T62]], align 1 409 ; CHECK-NEXT: [[T64:%.*]] = zext i8 [[T63]] to i32
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/SLPVectorizer/X86/ |
H A D | bad-reduction.ll | 393 ; CHECK-NEXT: [[T63:%.*]] = load i8, i8* [[T62]], align 1 409 ; CHECK-NEXT: [[T64:%.*]] = zext i8 [[T63]] to i32
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | load-constant-i16.ll | 3454 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T49.X, 0 3603 ; EG-NEXT: LSHR T63.W, T49.Y, literal.y, 3607 ; EG-NEXT: AND_INT T63.Z, T49.Y, literal.x, 3611 ; EG-NEXT: LSHR T63.Y, T49.X, literal.y, 3613 ; EG-NEXT: AND_INT * T63.X, T49.X, literal.z, 4190 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T52.X, 0 4324 ; EG-NEXT: BFE_INT T63.Z, T46.W, 0.0, literal.x, 4328 ; EG-NEXT: BFE_INT T63.X, T46.Z, 0.0, literal.x, 4337 ; EG-NEXT: BFE_INT T63.W, T2.Y, 0.0, literal.x, 4341 ; EG-NEXT: BFE_INT T63.Y, PS, 0.0, literal.x,
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H A D | load-global-i16.ll | 4065 ; EG-NEXT: LSHR T63.W, T49.W, literal.y, 4069 ; EG-NEXT: AND_INT T63.Z, T49.W, literal.x, 4073 ; EG-NEXT: LSHR T63.Y, T49.Z, literal.y, 4075 ; EG-NEXT: AND_INT * T63.X, T49.Z, literal.z, 4238 ; CM-NEXT: LSHR * T63.W, T48.Y, literal.y, 4241 ; CM-NEXT: AND_INT T63.Z, T48.Y, literal.x, 4245 ; CM-NEXT: LSHR T63.Y, T48.X, literal.y, 4248 ; CM-NEXT: AND_INT T63.X, T48.X, literal.x, 4857 ; EG-NEXT: BFE_INT T63.Z, T47.W, 0.0, literal.x, 4861 ; EG-NEXT: BFE_INT T63.X, T47.Z, 0.0, literal.x, [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/X86/ |
H A D | bad-reduction.ll | 393 ; CHECK-NEXT: [[T63:%.*]] = load i8, i8* [[T62]], align 1 409 ; CHECK-NEXT: [[T64:%.*]] = zext i8 [[T63]] to i32
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/dports/lang/clang-mesa/clang-13.0.1.src/test/CodeGen/X86/ |
H A D | x86_32-arguments-darwin.c | 310 typedef int T63 __attribute((vector_size(16))); 311 struct s63 { T63 x; int y; };
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/dports/net/php80-soap/php-8.0.15/ext/soap/tests/soap12/ |
H A D | T63.phpt | 2 SOAP 1.2: T63 validateCountryCode
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/dports/lang/php80/php-8.0.15/ext/soap/tests/soap12/ |
H A D | T63.phpt | 2 SOAP 1.2: T63 validateCountryCode
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/dports/www/mod_php80/php-8.0.15/ext/soap/tests/soap12/ |
H A D | T63.phpt | 2 SOAP 1.2: T63 validateCountryCode
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/dports/www/wt/wt-4.6.1/src/web/ |
H A D | md5.c | 127 #define T63 0x2ad7d2bb macro 299 SET(c, d, a, b, 2, 15, T63); in wt_md5_process()
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/dports/net-im/kopete/kopete-21.12.3/protocols/qq/ |
H A D | md5.c | 160 #define T63 0x2ad7d2bb macro 308 SET(c, d, a, b, 2, 15, T63); in md5_process()
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/dports/science/conduit/conduit-0.8.0/src/thirdparty_builtin/civetweb-0a95342/src/ |
H A D | md5.inl | 207 #define T63 (0x2ad7d2bb) macro 387 SET(c, d, a, b, 2, 15, T63);
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