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/qemu/hw/m68k/
H A Dbootinfo.h18 base += 2; \
20 base += 2; \
26 base += 2; \
28 base += 2; \
30 base += 4; \
36 base += 2; \
38 base += 2; \
40 base += 4; \
42 base += 4; \
57 base = QEMU_ALIGN_PTR_UP(base, 4); \
[all …]
/qemu/tests/qtest/
H A Daspeed_hace-test.c181 qtest_writel(s, base + HACE_STS, 0x00000200); in test_md5()
214 qtest_writel(s, base + HACE_STS, 0x00000200); in test_sha256()
247 qtest_writel(s, base + HACE_STS, 0x00000200); in test_sha512()
288 write_regs(s, base, src_addr, in test_sha256_sg()
298 qtest_writel(s, base + HACE_STS, 0x00000200); in test_sha256_sg()
339 write_regs(s, base, src_addr, in test_sha512_sg()
349 qtest_writel(s, base + HACE_STS, 0x00000200); in test_sha512_sg()
390 qtest_writel(s, base + HACE_STS, 0x00000200); in test_sha256_accum()
431 qtest_writel(s, base + HACE_STS, 0x00000200); in test_sha512_accum()
494 qtest_writel(s, base + HACE_HASH_SRC, 0); in test_addresses()
[all …]
/qemu/hw/tricore/
H A Dtc27x_soc.c71 hwaddr base, hwaddr size) in make_rom() argument
82 hwaddr base, hwaddr size) in make_ram() argument
93 MemoryRegion *orig, hwaddr base) in make_alias() argument
147 sc->memmap[TC27XD_PSPRX].base); in tc27x_soc_init_memory_mapping()
149 sc->memmap[TC27XD_DSPRX].base); in tc27x_soc_init_memory_mapping()
169 sc->memmap[TC27XD_PFLASH0_U].base); in tc27x_soc_init_memory_mapping()
171 sc->memmap[TC27XD_PFLASH1_U].base); in tc27x_soc_init_memory_mapping()
173 sc->memmap[TC27XD_OLDA_U].base); in tc27x_soc_init_memory_mapping()
175 sc->memmap[TC27XD_BROM_U].base); in tc27x_soc_init_memory_mapping()
177 sc->memmap[TC27XD_LMURAM_U].base); in tc27x_soc_init_memory_mapping()
[all …]
/qemu/target/loongarch/tcg/
H A Dtranslate.c97 ctx->base.is_jmp = DISAS_NORETURN; in generate_exception()
109 tcg_gen_exit_tb(ctx->base.tb, n); in gen_goto_tb()
133 ctx->base.max_insns = MIN(ctx->base.max_insns, bound); in loongarch_tr_init_disas_context()
244 base = temp; in make_address_x()
247 tcg_gen_ext32u_tl(temp, base); in make_address_x()
248 base = temp; in make_address_x()
250 return base; in make_address_x()
287 ctx->opcode = translator_ldl(cpu_env(cs), &ctx->base, ctx->base.pc_next); in loongarch_tr_translate_insn()
296 ctx->base.pc_next += 4; in loongarch_tr_translate_insn()
299 ctx->base.pc_next = (uint32_t)ctx->base.pc_next; in loongarch_tr_translate_insn()
[all …]
/qemu/hw/riscv/
H A Dmicrochip_pfsoc.c314 memmap[MICROCHIP_PFSOC_AXISW].base, in microchip_pfsoc_soc_realize()
368 memmap[MICROCHIP_PFSOC_WDOG0].base, in microchip_pfsoc_soc_realize()
371 memmap[MICROCHIP_PFSOC_WDOG1].base, in microchip_pfsoc_soc_realize()
374 memmap[MICROCHIP_PFSOC_WDOG2].base, in microchip_pfsoc_soc_realize()
385 memmap[MICROCHIP_PFSOC_SPI0].base, in microchip_pfsoc_soc_realize()
388 memmap[MICROCHIP_PFSOC_SPI1].base, in microchip_pfsoc_soc_realize()
393 memmap[MICROCHIP_PFSOC_I2C0].base, in microchip_pfsoc_soc_realize()
396 memmap[MICROCHIP_PFSOC_I2C1].base, in microchip_pfsoc_soc_realize()
401 memmap[MICROCHIP_PFSOC_CAN0].base, in microchip_pfsoc_soc_realize()
404 memmap[MICROCHIP_PFSOC_CAN1].base, in microchip_pfsoc_soc_realize()
[all …]
H A Dopentitan.c98 memmap[IBEX_DEV_RAM].base, machine->ram); in opentitan_machine_init()
106 memmap[IBEX_DEV_RAM].base, in opentitan_machine_init()
163 memmap[IBEX_DEV_ROM].base, &s->rom); in lowrisc_ibex_soc_realize()
255 memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); in lowrisc_ibex_soc_realize()
259 memmap[IBEX_DEV_I2C].base, memmap[IBEX_DEV_I2C].size); in lowrisc_ibex_soc_realize()
283 memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); in lowrisc_ibex_soc_realize()
285 memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); in lowrisc_ibex_soc_realize()
287 memmap[IBEX_DEV_KMAC].base, memmap[IBEX_DEV_KMAC].size); in lowrisc_ibex_soc_realize()
295 memmap[IBEX_DEV_EDNO].base, memmap[IBEX_DEV_EDNO].size); in lowrisc_ibex_soc_realize()
297 memmap[IBEX_DEV_EDN1].base, memmap[IBEX_DEV_EDN1].size); in lowrisc_ibex_soc_realize()
[all …]
H A Dsifive_u.c156 (long)memmap[SIFIVE_U_DEV_DRAM].base); in create_fdt()
159 memmap[SIFIVE_U_DEV_DRAM].base >> 32, memmap[SIFIVE_U_DEV_DRAM].base, in create_fdt()
216 0x0, memmap[SIFIVE_U_DEV_CLINT].base, in create_fdt()
224 (long)memmap[SIFIVE_U_DEV_OTP].base); in create_fdt()
228 0x0, memmap[SIFIVE_U_DEV_OTP].base, in create_fdt()
243 0x0, memmap[SIFIVE_U_DEV_PRCI].base, in create_fdt()
277 0x0, memmap[SIFIVE_U_DEV_PLIC].base, in create_fdt()
298 0x0, memmap[SIFIVE_U_DEV_GPIO].base, in create_fdt()
326 0x0, memmap[SIFIVE_U_DEV_PDMA].base, in create_fdt()
336 0x0, memmap[SIFIVE_U_DEV_L2CC].base, in create_fdt()
[all …]
H A Dsifive_e.c96 memmap[SIFIVE_E_DEV_DTIM].base, machine->ram); in sifive_e_machine_init()
119 memmap[SIFIVE_E_DEV_DTIM].base, in sifive_e_machine_init()
208 memmap[SIFIVE_E_DEV_MROM].base, &s->mask_rom); in sifive_e_soc_realize()
211 s->plic = sifive_plic_create(memmap[SIFIVE_E_DEV_PLIC].base, in sifive_e_soc_realize()
222 riscv_aclint_swi_create(memmap[SIFIVE_E_DEV_CLINT].base, in sifive_e_soc_realize()
224 riscv_aclint_mtimer_create(memmap[SIFIVE_E_DEV_CLINT].base + in sifive_e_soc_realize()
229 sifive_e_prci_create(memmap[SIFIVE_E_DEV_PRCI].base); in sifive_e_soc_realize()
262 sifive_uart_create(sys_mem, memmap[SIFIVE_E_DEV_UART0].base, in sifive_e_soc_realize()
267 memmap[SIFIVE_E_DEV_PWM0].base, memmap[SIFIVE_E_DEV_PWM0].size); in sifive_e_soc_realize()
268 sifive_uart_create(sys_mem, memmap[SIFIVE_E_DEV_UART1].base, in sifive_e_soc_realize()
[all …]
/qemu/qobject/
H A Dqobject.c20 offsetof(QNull, base) != 0 ||
21 offsetof(QNum, base) != 0 ||
22 offsetof(QString, base) != 0 ||
23 offsetof(QDict, base) != 0 ||
24 offsetof(QList, base) != 0 ||
25 offsetof(QBool, base) != 0,
40 assert(!obj->base.refcnt); in qobject_destroy()
41 assert(QTYPE_QNULL < obj->base.type && obj->base.type < QTYPE__MAX); in qobject_destroy()
42 qdestroy[obj->base.type](obj); in qobject_destroy()
65 if (!x || !y || x->base.type != y->base.type) { in qobject_is_equal()
[all …]
/qemu/ui/
H A Dspice-input.c41 .base.type = SPICE_INTERFACE_KEYBOARD,
42 .base.description = "qemu keyboard",
161 .base.type = SPICE_INTERFACE_MOUSE,
162 .base.description = "mouse",
214 .base.type = SPICE_INTERFACE_TABLET,
215 .base.description = "tablet",
247 kbd->sin.base.sif = &kbd_interface.base; in qemu_spice_input_init()
248 qemu_spice.add_interface(&kbd->sin.base); in qemu_spice_input_init()
252 pointer->mouse.base.sif = &mouse_interface.base; in qemu_spice_input_init()
253 pointer->tablet.base.sif = &tablet_interface.base; in qemu_spice_input_init()
[all …]
/qemu/tests/qemu-iotests/
H A D27435 iotests.qemu_img_create('-f', iotests.imgfmt, '-b', base,
40 iotests.qemu_io_log('-c', 'write -P 1 0 %d' % size_long, base)
44 vm.add_blockdev('file,filename=%s,node-name=base-file' % base)
52 with iotests.FilePath('base') as base, \
69 base)
81 iotests.qemu_img_log('map', '--output=json', base)
82 iotests.qemu_img_log('map', '--output=human', base)
122 iotests.qemu_img_log('commit', '-b', base, top)
123 iotests.img_info_log(base)
124 iotests.qemu_io_log('-c', 'read -P 1 0 %d' % size_short, base)
[all …]
H A D043.out17 qemu-img: Backing file 'TEST_DIR/t.IMGFMT.2.base' creates an infinite loop.
27 backing file: TEST_DIR/t.IMGFMT.2.base
29 image: TEST_DIR/t.IMGFMT.2.base
33 backing file: TEST_DIR/t.IMGFMT.1.base
35 image: TEST_DIR/t.IMGFMT.1.base
47 "full-backing-filename": "TEST_DIR/t.IMGFMT.2.base",
48 "backing-filename": "TEST_DIR/t.IMGFMT.2.base",
53 "filename": "TEST_DIR/t.IMGFMT.2.base",
56 "full-backing-filename": "TEST_DIR/t.IMGFMT.1.base",
57 "backing-filename": "TEST_DIR/t.IMGFMT.1.base",
[all …]
H A D228.out7 bs->backing_file: file:TEST_DIR/PID-base.img
8 bs->backing->bs->filename: TEST_DIR/PID-base.img
22 bs->backing->bs->filename: TEST_DIR/PID-base.img
28 bs->backing_file: TEST_DIR/PID-base.img
29 bs->backing->bs->filename: TEST_DIR/PID-base.img
35 bs->backing_file: file:TEST_DIR/PID-base.img
36 bs->backing->bs->filename: TEST_DIR/PID-base.img
44 bs->backing_file: file:TEST_DIR/PID-base.img
58 bs->backing_file: TEST_DIR/PID-base.img
69 bs->backing_file: TEST_DIR/PID-base.img
[all …]
H A D191.out22 'base':'TEST_DIR/t.IMGFMT.base',
334 "node-name": "base",
348 "file": "TEST_DIR/t.IMGFMT.base"
376 "file": "TEST_DIR/t.IMGFMT.base"
400 backing file: TEST_DIR/t.IMGFMT.base
406 backing file: TEST_DIR/t.IMGFMT.base
429 'base':'TEST_DIR/t.IMGFMT.base',
697 "file": "TEST_DIR/t.IMGFMT.base"
725 "file": "TEST_DIR/t.IMGFMT.base"
818 backing file: TEST_DIR/t.IMGFMT.base
[all …]
H A D12248 TEST_IMG="$TEST_IMG".base _make_test_img 64M
56 _make_test_img -b "$TEST_IMG".base -F $IMGFMT
58 $QEMU_IMG convert -O $IMGFMT -B "$TEST_IMG".base \
67 _make_test_img -b "$TEST_IMG".base -F $IMGFMT
70 $QEMU_IMG convert -O $IMGFMT -B "$TEST_IMG".base -F $IMGFMT \
90 TEST_IMG="$TEST_IMG".base _make_test_img 256M
103 _make_test_img -b "$TEST_IMG".base 768M -F $IMGFMT
205 TEST_IMG="$TEST_IMG".base _make_test_img 64M
208 _make_test_img -b "$TEST_IMG".base 64M -F $IMGFMT
305 TEST_IMG="$TEST_IMG".base _make_test_img 64M
[all …]
/qemu/hw/i386/
H A Dmicrovm-dt.c74 hwaddr base = dev->mmio[0].addr; in dt_add_virtio() local
76 unsigned index = (base - VIRTIO_MMIO_BASE) / size; in dt_add_virtio()
92 hwaddr base = MICROVM_XHCI_BASE; in dt_add_xhci() local
96 nodename = g_strdup_printf("/usb@%" PRIx64, base); in dt_add_xhci()
107 hwaddr base = PCIE_MMIO_BASE; in dt_add_pcie() local
111 nodename = g_strdup_printf("/pcie@%" PRIx64, base); in dt_add_pcie()
153 hwaddr base = dev->mmio[0].addr; in dt_add_ioapic() local
158 switch (base) { in dt_add_ioapic()
178 2, base, 2, 0x1000); in dt_add_ioapic()
202 if (base == 0x3f8 /* com1 */) { in dt_add_isa_serial()
[all …]
/qemu/hw/s390x/
H A Dtod-tcg.c24 *tod = td->base; in qemu_s390_tod_get()
27 if (tod->low < td->base.low) { in qemu_s390_tod_get()
37 td->base = *tod; in qemu_s390_tod_set()
39 td->base.low -= time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); in qemu_s390_tod_set()
40 if (td->base.low > tod->low) { in qemu_s390_tod_set()
41 td->base.high--; in qemu_s390_tod_set()
69 td->base.high = 0; in qemu_s390_tod_init()
70 td->base.low = TOD_UNIX_EPOCH + (time2tod(mktimegm(&tm)) * 1000000000ULL); in qemu_s390_tod_init()
71 if (td->base.low < TOD_UNIX_EPOCH) { in qemu_s390_tod_init()
72 td->base.high += 1; in qemu_s390_tod_init()
/qemu/target/i386/tcg/
H A Dmpx_helper.c36 static uint64_t lookup_bte64(CPUX86State *env, uint64_t base, uintptr_t ra) in lookup_bte64() argument
46 bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12); in lookup_bte64()
53 return (extract64(base, 3, 17) << 5) + (bt & ~7); in lookup_bte64()
56 static uint32_t lookup_bte32(CPUX86State *env, uint32_t base, uintptr_t ra) in lookup_bte32() argument
66 bde = (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK); in lookup_bte32()
73 return (extract32(base, 2, 10) << 4) + (bt & ~3); in lookup_bte32()
81 bte = lookup_bte64(env, base, ra); in helper_bndldx64()
98 bte = lookup_bte32(env, base, ra); in helper_bndldx32()
109 void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr, in helper_bndstx64() argument
115 bte = lookup_bte64(env, base, ra); in helper_bndstx64()
[all …]
/qemu/block/
H A Dcommit.c38 BlockBackend *base; member
59 blk_unref(s->base); in commit_prepare()
60 s->base = NULL; in commit_prepare()
85 if (s->base) { in commit_abort()
86 blk_unref(s->base); in commit_abort()
144 base_len = blk_co_getlength(s->base); in commit_run()
281 base_size = bdrv_getlength(base); in commit_start()
398 ret = blk_insert_bs(s->base, base, errp); in commit_start()
403 s->base_bs = base; in commit_start()
427 if (s->base) { in commit_start()
[all …]
/qemu/tests/multiboot/
H A Dlibc.c49 static void print_num(uint64_t value, int base) in print_num() argument
56 buf[i--] = digits[value % base]; in print_num()
57 value /= base; in print_num()
68 int base; in printf() local
103 base = 16; in printf()
108 base = 10; in printf()
111 base = 8; in printf()
127 if (alt_form && base == 16) { in printf()
131 print_num(val, base); in printf()
/qemu/hw/openrisc/
H A Dvirt.c73 hwaddr base; member
153 memmap[VIRT_DRAM].base); in openrisc_create_fdt()
156 memmap[VIRT_DRAM].base, mem_size); in openrisc_create_fdt()
217 sysbus_mmio_map(s, 0, base); in openrisc_virt_ompic_init()
220 nodename = g_strdup_printf("/ompic@%" HWADDR_PRIx, base); in openrisc_virt_ompic_init()
223 qemu_fdt_setprop_cells(fdt, nodename, "reg", base, size); in openrisc_virt_ompic_init()
264 sifive_test_create(base); in openrisc_virt_test_init()
303 sysbus_create_simple(TYPE_GOLDFISH_RTC, base, rtc_irq); in openrisc_virt_rtc_init()
459 sysbus_mmio_map(sysbus, 0, base); in openrisc_virt_virtio_init()
521 virt_memmap[VIRT_PIO].base, in openrisc_virt_init()
[all …]
/qemu/hw/arm/
H A Dsbsa-ref.c330 memory_region_add_subregion(sysmem, base, in sbsa_flash_map1()
408 hwaddr base = sbsa_ref_memmap[SBSA_SECURE_MEM].base; in create_secure_ram() local
518 hwaddr base = sbsa_ref_memmap[uart].base; in create_uart() local
525 memory_region_add_subregion(mem, base, in create_uart()
532 hwaddr base = sbsa_ref_memmap[SBSA_RTC].base; in create_rtc() local
567 hwaddr base = sbsa_ref_memmap[SBSA_GPIO].base; in create_gpio() local
582 hwaddr base = sbsa_ref_memmap[SBSA_AHCI].base; in create_ahci() local
601 hwaddr base = sbsa_ref_memmap[SBSA_XHCI].base; in create_xhci() local
613 hwaddr base = sbsa_ref_memmap[SBSA_SMMU].base; in create_smmu() local
700 hwaddr base = sbsa_ref_memmap[SBSA_SECURE_EC].base; in create_secure_ec() local
[all …]
/qemu/tests/tcg/minilib/
H A Dprintf.c28 static void print_num(unsigned long long value, int base) in print_num() argument
40 buf[i--] = digits[value % base]; in print_num()
41 value /= base; in print_num()
51 int base; in ml_printf() local
87 base = 16; in ml_printf()
92 base = 10; in ml_printf()
95 base = 8; in ml_printf()
111 if (alt_form && base == 16) { in ml_printf()
115 print_num(val, base); in ml_printf()
/qemu/include/qapi/qmp/
H A Dqobject.h45 struct QObjectBase_ base; member
55 _obj ? container_of(&_obj->base, QObject, base) : NULL; \
76 obj->base.refcnt++; in qobject_ref_impl()
97 assert(!obj || obj->base.refcnt); in qobject_unref_impl()
98 if (obj && --obj->base.refcnt == 0) { in qobject_unref_impl()
126 assert(QTYPE_NONE < obj->base.type && obj->base.type < QTYPE__MAX); in qobject_type()
127 return obj->base.type; in qobject_type()
/qemu/crypto/
H A Dcipher-nettle.c.inc242 QCryptoCipher base;
264 QCryptoCipher base;
286 QCryptoCipher base;
312 QCryptoCipher base;
338 QCryptoCipher base;
364 QCryptoCipher base;
387 QCryptoCipher base;
411 QCryptoCipher base;
434 QCryptoCipher base;
536 return &ctx->base;
[all …]

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