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Searched refs:d (Results 1 – 25 of 894) sorted by relevance

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/qemu/tests/qtest/
H A Dtco-test.c64 !d->args ? "" : d->args); in test_init()
88 val = qpci_io_readw(d->dev, d->tco_io_bar, TCO1_CNT); in stop_tco()
90 qpci_io_writew(d->dev, d->tco_io_bar, TCO1_CNT, val); in stop_tco()
97 val = qpci_io_readw(d->dev, d->tco_io_bar, TCO1_CNT); in start_tco()
99 qpci_io_writew(d->dev, d->tco_io_bar, TCO1_CNT, val); in start_tco()
104 qpci_io_writew(d->dev, d->tco_io_bar, TCO_RLD, 4); in load_tco()
182 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); in test_tco_timeout()
188 qpci_io_writew(d.dev, d.tco_io_bar, TCO1_STS, val); in test_tco_timeout()
189 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); in test_tco_timeout()
195 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); in test_tco_timeout()
[all …]
/qemu/hw/9pfs/
H A Dtrace-events4 v9fs_rcancel(uint16_t tag, uint8_t id) "tag %d id %d"
5 v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
10 v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
14 …nt8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
16 v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
18 …32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %…
20 v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
21 v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
28 …, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
34 v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
[all …]
/qemu/hw/watchdog/
H A Dwdt_i6300esb.c116 if (!d->enabled) in OBJECT_DECLARE_SIMPLE_TYPE()
119 d->stage = stage; in OBJECT_DECLARE_SIMPLE_TYPE()
121 if (d->stage <= 1) in OBJECT_DECLARE_SIMPLE_TYPE()
162 d->free_run = 0; in i6300esb_reset()
163 d->locked = 0; in i6300esb_reset()
164 d->enabled = 0; in i6300esb_reset()
167 d->stage = 1; in i6300esb_reset()
180 I6300State *d = vp; in i6300esb_timer_expired() local
274 I6300State *d = vp; in i6300esb_mem_readw() local
448 memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d, in i6300esb_realize()
[all …]
/qemu/target/arm/tcg/
H A Dcrypto_helper.c66 t.d[0] = st->d[1] ^ rk->d[1]; in HELPER()
67 t.d[1] = st->d[0] ^ rk->d[0]; in HELPER()
69 ad->d[0] = t.d[1]; in HELPER()
70 ad->d[1] = t.d[0]; in HELPER()
91 t.d[0] = st->d[1] ^ rk->d[1]; in HELPER()
92 t.d[1] = st->d[0] ^ rk->d[0]; in HELPER()
94 ad->d[0] = t.d[1]; in HELPER()
95 ad->d[1] = t.d[0]; in HELPER()
115 t.d[0] = st->d[1]; in HELPER()
116 t.d[1] = st->d[0]; in HELPER()
[all …]
/qemu/hw/usb/
H A Dtrace-events88 …rl, int mplen, int eps, int ep, int devaddr) "QH @ 0x%08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
89 …_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ 0x%08x - c %d, h %d, dtc %d, i %d"
238 usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
240 usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
292 usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) "dev %d, ep %d, %d/%d"
321 usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
325 …int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
329 usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d"
330 usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d"
335 usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d"
[all …]
/qemu/tests/qtest/libqos/
H A Dvirtio.c76 return d->bus->config_readb(d, addr); in qvirtio_config_readb()
82 return d->bus->config_readw(d, addr); in qvirtio_config_readw()
88 return d->bus->config_readl(d, addr); in qvirtio_config_readl()
94 return d->bus->config_readq(d, addr); in qvirtio_config_readq()
99 return d->bus->get_features(d); in qvirtio_get_features()
107 d->bus->set_features(d, features); in qvirtio_set_features()
118 d->bus->set_status(d, status); in qvirtio_set_features()
140 d->bus->set_status(d, 0); in qvirtio_reset()
147 d->bus->set_status(d, d->bus->get_status(d) | VIRTIO_CONFIG_S_ACKNOWLEDGE); in qvirtio_set_acknowledge()
153 d->bus->set_status(d, d->bus->get_status(d) | VIRTIO_CONFIG_S_DRIVER); in qvirtio_set_driver()
[all …]
H A De1000e.c39 void e1000e_tx_ring_push(QE1000E *d, void *descr) in e1000e_tx_ring_push() argument
104 QE1000E_PCI *d = (QE1000E_PCI *) obj; in e1000e_pci_start_hw() local
108 qpci_device_enable(&d->pci_dev); in e1000e_pci_start_hw()
115 qpci_msix_enable(&d->pci_dev); in e1000e_pci_start_hw()
181 QE1000E_PCI *d = g_new0(QE1000E_PCI, 1); in e1000e_pci_create() local
189 d->mac_regs = qpci_iomap(&d->pci_dev, 0, NULL); in e1000e_pci_create()
193 g_assert(d->e1000e.tx_ring != 0); in e1000e_pci_create()
197 g_assert(d->e1000e.rx_ring != 0); in e1000e_pci_create()
199 d->obj.get_driver = e1000e_pci_get_driver; in e1000e_pci_create()
200 d->obj.start_hw = e1000e_pci_start_hw; in e1000e_pci_create()
[all …]
H A Dvirtio-pci.c213 feat = d->bus->get_guest_features(d); in qvirtio_pci_virtqueue_setup_common()
215 d->bus->queue_select(d, index); in qvirtio_pci_virtqueue_setup_common()
218 vqpci->vq.size = d->bus->get_queue_size(d); in qvirtio_pci_virtqueue_setup_common()
238 d->bus->set_queue_address(d, &vqpci->vq); in qvirtio_pci_virtqueue_setup_common()
306 d->bar = qpci_iomap(d->pdev, d->bar_idx, NULL); in qvirtio_pci_device_enable()
311 qpci_iounmap(d->pdev, d->bar); in qvirtio_pci_device_disable()
328 qpci_io_writel(d->pdev, d->pdev->msix_table_bar, in qvirtqueue_pci_msix_setup()
330 qpci_io_writel(d->pdev, d->pdev->msix_table_bar, in qvirtqueue_pci_msix_setup()
333 qpci_io_writel(d->pdev, d->pdev->msix_table_bar, in qvirtqueue_pci_msix_setup()
338 qpci_io_writel(d->pdev, d->pdev->msix_table_bar, in qvirtqueue_pci_msix_setup()
[all …]
H A Digb.c57 QE1000E_PCI *d = (QE1000E_PCI *) obj; in igb_pci_start_hw() local
61 qpci_device_enable(&d->pci_dev); in igb_pci_start_hw()
77 qpci_msix_enable(&d->pci_dev); in igb_pci_start_hw()
113 e1000e_macreg_write(&d->e1000e, in igb_pci_start_hw()
146 QE1000E_PCI *d = g_new0(QE1000E_PCI, 1); in igb_pci_create() local
154 d->mac_regs = qpci_iomap(&d->pci_dev, 0, NULL); in igb_pci_create()
158 g_assert(d->e1000e.tx_ring != 0); in igb_pci_create()
162 g_assert(d->e1000e.rx_ring != 0); in igb_pci_create()
164 d->obj.get_driver = igb_pci_get_driver; in igb_pci_create()
165 d->obj.start_hw = igb_pci_start_hw; in igb_pci_create()
[all …]
/qemu/hw/display/
H A Dvga-helpers.h131 d += 32; in vga_draw_line2()
138 ((uint32_t *)d)[2*(n)] = ((uint32_t *)d)[2*(n)+1] = (v)
173 d += 64; in vga_draw_line2d2()
211 d += 32; in vga_draw_line4()
347 d += 4; in vga_draw_line15_le()
366 d += 4; in vga_draw_line15_be()
388 d += 4; in vga_draw_line16_le()
407 d += 4; in vga_draw_line16_be()
428 d += 4; in vga_draw_line24_le()
446 d += 4; in vga_draw_line24_be()
[all …]
H A Dtrace-events8 …nt dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs 0x%x abs %d"
36 …32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
37 …32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
39 …t32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
47 …sh(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
60 qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
69 …eft, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
90 …t qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
105 …surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
106 …pdate_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
[all …]
/qemu/hw/pci-bridge/
H A Dpcie_root_port.c26 pcie_aer_root_set_vector(d, rpc->aer_vector(d)); in rp_aer_vector_update()
34 pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND); in rp_write_config()
52 pcie_cap_root_reset(d); in rp_reset_hold()
54 pcie_cap_slot_reset(d); in rp_reset_hold()
56 pcie_acs_reset(d); in rp_reset_hold()
76 pcie_port_init_reg(d); in rp_realize()
128 pcie_cap_exit(d); in rp_realize()
134 pci_bridge_exitfn(d); in rp_realize()
142 pcie_aer_exit(d); in rp_exit()
144 pcie_cap_exit(d); in rp_exit()
[all …]
/qemu/hw/dma/
H A Di8257.c135 ff = d->flip_flop; in i8257_getff()
249 d->mask = 0; in i8257_write_cont()
373 d->running = 0; in i8257_dma_run()
471 i8257_write_cont(d, (0x05 << d->dshift), 0, 1); in i8257_reset()
565 d->base, &d->channel_io); in i8257_realize()
568 d->page_base, page_portio_list, d, in i8257_realize()
572 d->pageh_base, pageh_portio_list, d, in i8257_realize()
576 memory_region_init_io(&d->cont_io, OBJECT(isa), &cont_io_ops, d, in i8257_realize()
579 d->base + (8 << d->dshift), &d->cont_io); in i8257_realize()
585 d->dma_bh = qemu_bh_new(i8257_dma_run, d); in i8257_realize()
[all …]
/qemu/hw/xen/
H A Dxen-host-pci-device.c42 d->domain, d->bus, d->dev, d->func, name); in xen_host_pci_sysfs_path()
339 d->config_fd = -1; in xen_host_pci_device_get()
340 d->domain = domain; in xen_host_pci_device_get()
341 d->bus = bus; in xen_host_pci_device_get()
342 d->dev = dev; in xen_host_pci_device_get()
343 d->func = func; in xen_host_pci_device_get()
359 d->vendor_id = v; in xen_host_pci_device_get()
365 d->device_id = v; in xen_host_pci_device_get()
371 d->irq = v; in xen_host_pci_device_get()
377 d->class_code = v; in xen_host_pci_device_get()
[all …]
/qemu/hw/audio/
H A Dintel-hda.c240 if (d->state_sts & d->wake_en) { in intel_hda_update_int_sts()
314 intel_hda_send_command(d, d->icw); in intel_hda_corb_run()
323 if ((d->corb_rp & 0xff) == d->corb_wp) { in intel_hda_corb_run()
327 if (d->rirb_count == d->rirb_cnt) { in intel_hda_corb_run()
380 if (d->rirb_count == d->rirb_cnt) { in intel_hda_response()
388 d->rirb_count, d->rirb_cnt); in intel_hda_response()
407 st = output ? d->st + 4 : d->st; in intel_hda_xfer()
939 if (d->last_write && d->last_reg == reg && d->last_val == val) { in intel_hda_reg_write()
1003 if (!d->last_write && d->last_reg == reg && d->last_val == ret) { in intel_hda_reg_read()
1097 d->name = object_get_typename(OBJECT(d)); in intel_hda_realize()
[all …]
/qemu/chardev/
H A Dchar-mux.c141 mux_chr_send_event(d, d->focus, event); in mux_chr_be_event()
173 mux_set_focus(chr, (d->focus + 1) % d->mux_cnt); in mux_proc_byte()
176 d->timestamps = !d->timestamps; in mux_proc_byte()
196 while (be && d->prod[m] != d->cons[m] && in mux_chr_accept_input()
199 &d->buffer[m][d->cons[m]++ & MUX_BUFFER_MASK], 1); in mux_chr_accept_input()
209 if ((d->prod[m] - d->cons[m]) < MUX_BUFFER_SIZE) { in mux_chr_can_read()
232 if (d->prod[m] == d->cons[m] && in mux_chr_read()
237 d->buffer[m][d->prod[m]++ & MUX_BUFFER_MASK] = buf[i]; in mux_chr_read()
311 mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_OUT); in mux_set_focus()
316 mux_chr_send_event(d, d->focus, CHR_EVENT_MUX_IN); in mux_set_focus()
[all …]
/qemu/accel/tcg/
H A Dtcg-runtime-gvec.c47 clear_high(d, oprsz, desc); in HELPER()
58 clear_high(d, oprsz, desc); in HELPER()
69 clear_high(d, oprsz, desc); in HELPER()
80 clear_high(d, oprsz, desc); in HELPER()
91 clear_high(d, oprsz, desc); in HELPER()
102 clear_high(d, oprsz, desc); in HELPER()
113 clear_high(d, oprsz, desc); in HELPER()
124 clear_high(d, oprsz, desc); in HELPER()
135 clear_high(d, oprsz, desc); in HELPER()
146 clear_high(d, oprsz, desc); in HELPER()
[all …]
/qemu/hw/ide/
H A Dsii3112.c45 SiI3112PCIState *d = opaque; in sii3112_reg_read() local
50 val = d->i.bmdma[0].cmd; in sii3112_reg_read()
53 val = d->regs[0].swdata; in sii3112_reg_read()
65 val = d->i.bmdma[1].cmd; in sii3112_reg_read()
68 val = d->regs[1].swdata; in sii3112_reg_read()
262 memory_region_init_io(&d->mmio, OBJECT(d), &sii3112_reg_ops, d, in sii3112_pci_realize()
268 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar0", &d->mmio, 0x80, 8); in sii3112_pci_realize()
271 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar1", &d->mmio, 0x88, 4); in sii3112_pci_realize()
274 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar2", &d->mmio, 0xc0, 8); in sii3112_pci_realize()
277 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar3", &d->mmio, 0xc8, 4); in sii3112_pci_realize()
[all …]
H A Dvia.c95 memory_region_init(&d->bmdma_bar, OBJECT(d), "via-bmdma-container", 16); in bmdma_setup_bar()
134 pci_ide_update_mode(d); in via_ide_reset()
208 memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops, in via_ide_realize()
212 memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops, in via_ide_realize()
216 memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops, in via_ide_realize()
220 memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops, in via_ide_realize()
224 bmdma_setup_bar(d); in via_ide_realize()
229 ide_bus_init(&d->bus[i], sizeof(d->bus[i]), ds, i, MAX_IDE_DEVS); in via_ide_realize()
232 bmdma_init(&d->bus[i], &d->bmdma[i], d); in via_ide_realize()
243 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io); in via_ide_exitfn()
[all …]
/qemu/tests/tcg/s390x/
H A Dvxeh2_vstrs.c35 S390Vector v2 = {.d[0] = 0x222000205e410000ULL, .d[1] = 0}; in test_ignored_match()
36 S390Vector v3 = {.d[0] = 0x205e410000000000ULL, .d[1] = 0}; in test_ignored_match()
37 S390Vector v4 = {.d[0] = 3, .d[1] = 0}; in test_ignored_match()
47 S390Vector v2 = {.d[0] = 0x5300000000000000ULL, .d[1] = 0}; in test_empty_needle()
48 S390Vector v3 = {.d[0] = 0, .d[1] = 0}; in test_empty_needle()
49 S390Vector v4 = {.d[0] = 0, .d[1] = 0}; in test_empty_needle()
59 S390Vector v2 = {.d[0] = 0x1122334455667700ULL, .d[1] = 0}; in test_max_length()
60 S390Vector v3 = {.d[0] = 0, .d[1] = 0}; in test_max_length()
61 S390Vector v4 = {.d[0] = 16, .d[1] = 0}; in test_max_length()
71 S390Vector v2 = {.d[0] = 0xffffff000fffff00ULL, .d[1] = 0x82b}; in test_no_match()
[all …]
/qemu/target/sparc/
H A Dvis_helper.c67 float64 d; member
79 VIS64 s, d; in helper_fpmerge() local
82 d.ll = src2; in helper_fpmerge()
86 d.VIS_B64(6) = d.VIS_B64(3); in helper_fpmerge()
88 d.VIS_B64(4) = d.VIS_B64(2); in helper_fpmerge()
90 d.VIS_B64(2) = d.VIS_B64(1); in helper_fpmerge()
99 VIS64 s, d; in helper_fmul8x16() local
123 VIS64 s, d; in helper_fmul8x16al() local
147 VIS64 s, d; in helper_fmul8x16au() local
266 VIS64 d; in helper_fexpand() local
[all …]
/qemu/target/m68k/
H A Dfpu_helper.c322 res->d = floatx80_add(val0->d, val1->d, &env->fp_status); in HELPER()
328 res->d = floatx80_add(val0->d, val1->d, &env->fp_status); in HELPER()
335 res->d = floatx80_add(val0->d, val1->d, &env->fp_status); in HELPER()
341 res->d = floatx80_sub(val1->d, val0->d, &env->fp_status); in HELPER()
347 res->d = floatx80_sub(val1->d, val0->d, &env->fp_status); in HELPER()
354 res->d = floatx80_sub(val1->d, val0->d, &env->fp_status); in HELPER()
360 res->d = floatx80_mul(val0->d, val1->d, &env->fp_status); in HELPER()
366 res->d = floatx80_mul(val0->d, val1->d, &env->fp_status); in HELPER()
373 res->d = floatx80_mul(val0->d, val1->d, &env->fp_status); in HELPER()
393 res->d = floatx80_div(val1->d, val0->d, &env->fp_status); in HELPER()
[all …]
/qemu/tests/tcg/multiarch/
H A Dsha1.c97 R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3); in SHA1Transform()
98 R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7); in SHA1Transform()
99 R0(c,d,e,a,b, 8); R0(b,c,d,e,a, 9); R0(a,b,c,d,e,10); R0(e,a,b,c,d,11); in SHA1Transform()
100 R0(d,e,a,b,c,12); R0(c,d,e,a,b,13); R0(b,c,d,e,a,14); R0(a,b,c,d,e,15); in SHA1Transform()
101 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); in SHA1Transform()
102 R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23); in SHA1Transform()
103 R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27); in SHA1Transform()
104 R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31); in SHA1Transform()
105 R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35); in SHA1Transform()
106 R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39); in SHA1Transform()
[all …]
/qemu/ui/
H A Dtrace-events24 gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
36 vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
105 …update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
106 qemu_spice_display_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) "%d +%d+%d %dx%d"
107 qemu_spice_display_surface(int qid, uint32_t w, uint32_t h, int fast) "%d %dx%d, fast %d"
114 qemu_spice_gl_cursor(int qid, bool enabled, bool hotspot) "%d enabled %d, hotspot %d"
117 qemu_spice_gl_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) "%d +%d+%d %dx%d"
131 clipboard_check_serial(int cur, int recv, bool ok) "cur:%d recv:%d %d"
155 dbus_mouse_rel_motion(int dx, int dy) "dx=%d, dy=%d"
157 dbus_update(int x, int y, int w, int h) "x=%d, y=%d, w=%d, h=%d"
[all …]
/qemu/hw/net/can/
H A Dcan_kvaser_pci.c104 d->s5920_irqstate = level; in kvaser_pci_irq_handler()
121 KvaserPCIState *d = opaque; in kvaser_pci_s5920_io_read() local
126 val = d->s5920_intcsr; in kvaser_pci_s5920_io_read()
139 KvaserPCIState *d = opaque; in kvaser_pci_s5920_io_write() local
147 d->s5920_intcsr = data; in kvaser_pci_s5920_io_write()
231 d->irq = qemu_allocate_irq(kvaser_pci_irq_handler, d, 0); in kvaser_pci_realize()
233 can_sja_init(s, d->irq); in kvaser_pci_realize()
240 memory_region_init_io(&d->s5920_io, OBJECT(d), &kvaser_pci_s5920_io_ops, in kvaser_pci_realize()
242 memory_region_init_io(&d->sja_io, OBJECT(d), &kvaser_pci_sja_io_ops, in kvaser_pci_realize()
244 memory_region_init_io(&d->xilinx_io, OBJECT(d), &kvaser_pci_xilinx_io_ops, in kvaser_pci_realize()
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