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Searched refs:hw (Results 1 – 25 of 1061) sorted by relevance

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/freebsd/sys/dev/ixgbe/
H A Dixgbe_api.c264 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), in ixgbe_init_hw()
277 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), in ixgbe_reset_hw()
293 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), in ixgbe_start_hw()
431 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), in ixgbe_get_bus_info()
468 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), in ixgbe_stop_adapter()
508 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), in ixgbe_identify_phy()
529 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), in ixgbe_reset_phy()
596 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), in ixgbe_setup_phy_link()
1070 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), in ixgbe_enable_mc()
1144 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw), in ixgbe_fc_enable()
[all …]
H A Dixgbe_phy.c534 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
546 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
1017 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
1315 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1585 hw->phy.ops.identify_sfp(hw); in ixgbe_get_supported_phy_sfp_layer_generic()
1604 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_get_supported_phy_sfp_layer_generic()
1606 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_get_supported_phy_sfp_layer_generic()
1619 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_get_supported_phy_sfp_layer_generic()
1664 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1711 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
[all …]
H A Dixgbe_common.c404 hw->phy.media_type = hw->mac.ops.get_media_type(hw); in ixgbe_start_hw_generic()
409 hw->mac.ops.clear_vfta(hw); in ixgbe_start_hw_generic()
412 hw->mac.ops.clear_hw_cntrs(hw); in ixgbe_start_hw_generic()
1312 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_buffer_bit_bang_generic()
1449 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_generic()
1479 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_buffer_bit_bang_generic()
2489 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); in ixgbe_init_rx_addrs_generic()
2505 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); in ixgbe_init_rx_addrs_generic()
2840 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_generic()
3603 hw->mac.ops.set_lan_id(hw); in ixgbe_get_san_mac_addr_generic()
[all …]
H A Dixgbe_x540.c221 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_X540()
239 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_reset_hw_X540()
270 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_X540()
278 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_X540()
281 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); in ixgbe_reset_hw_X540()
288 hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index, in ixgbe_reset_hw_X540()
292 hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index, in ixgbe_reset_hw_X540()
300 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, in ixgbe_reset_hw_X540()
375 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); in ixgbe_init_eeprom_params_X540()
598 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_X540()
[all …]
H A Dixgbe_api.h53 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
54 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
55 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
56 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
61 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
69 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
126 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
127 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
128 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
134 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_x550.c115 return hw->link.ops.read_link_unlocked(hw, hw->link.addr, reg, value); in ixgbe_read_cs4227()
128 return hw->link.ops.write_link_unlocked(hw, hw->link.addr, reg, value); in ixgbe_write_cs4227()
347 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_phy_x550em()
782 return hw->phy.ops.setup_link(hw); in ixgbe_setup_eee_fw()
2288 hw->mac.ops.set_lan_id(hw); in ixgbe_init_phy_ops_X550em()
2457 status = hw->phy.ops.init(hw); in ixgbe_reset_hw_X550em()
2543 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_X550em()
2550 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_X550em()
3439 hw->eeprom.ops.init_params(hw); in ixgbe_calc_checksum_X550()
3647 hw->phy.ops.identify(hw); in ixgbe_get_supported_physical_layer_X550em()
[all …]
H A Dixgbe_82599.c1062 status = hw->phy.ops.init(hw); in ixgbe_reset_hw_82599()
1069 status = hw->mac.ops.setup_sfp(hw); in ixgbe_reset_hw_82599()
1078 hw->phy.ops.reset(hw); in ixgbe_reset_hw_82599()
1177 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_82599()
1185 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_82599()
1188 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); in ixgbe_reset_hw_82599()
1195 hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index, in ixgbe_reset_hw_82599()
1199 hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index, in ixgbe_reset_hw_82599()
1207 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, in ixgbe_reset_hw_82599()
2206 hw->phy.ops.identify(hw); in ixgbe_get_supported_physical_layer_82599()
[all …]
H A Dixgbe_82598.c673 hw->phy.ops.read_reg(hw, 0xC79F, in ixgbe_check_mac_link_82598()
676 hw->phy.ops.read_reg(hw, 0xC00C, in ixgbe_check_mac_link_82598()
823 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_82598()
865 phy_status = hw->phy.ops.init(hw); in ixgbe_reset_hw_82598()
871 hw->phy.ops.reset(hw); in ixgbe_reset_hw_82598()
925 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_82598()
931 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_82598()
1154 hw->phy.ops.write_reg_mdi(hw, in ixgbe_read_i2c_phy_82598()
1161 hw->phy.ops.read_reg_mdi(hw, in ixgbe_read_i2c_phy_82598()
1237 hw->phy.ops.identify(hw); in ixgbe_get_supported_physical_layer_82598()
[all …]
/freebsd/sys/dev/igc/
H A Digc_api.c22 ret_val = hw->mac.ops.init_params(hw); in igc_init_mac_params()
48 ret_val = hw->nvm.ops.init_params(hw); in igc_init_nvm_params()
230 hw->mac.ops.clear_vfta(hw); in igc_clear_vfta()
304 return hw->mac.ops.reset_hw(hw); in igc_reset_hw()
319 return hw->mac.ops.init_hw(hw); in igc_init_hw()
487 hw->phy.ops.release(hw); in igc_release_phy()
531 return hw->phy.ops.reset(hw); in igc_phy_hw_reset()
637 return hw->nvm.ops.update(hw); in igc_update_nvm_checksum()
652 hw->nvm.ops.reload(hw); in igc_reload_nvm()
701 hw->phy.ops.power_up(hw); in igc_power_up_phy()
[all …]
H A Digc_mac.c179 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in igc_init_rx_addrs_generic()
184 hw->mac.ops.rar_set(hw, mac_addr, i); in igc_init_rx_addrs_generic()
213 ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1, in igc_check_alt_mac_addr_generic()
229 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in igc_check_alt_mac_addr_generic()
249 hw->mac.ops.rar_set(hw, alt_mac_addr, 0); in igc_check_alt_mac_addr_generic()
536 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) in igc_setup_link_generic()
549 hw->fc.current_mode = hw->fc.requested_mode; in igc_setup_link_generic()
555 ret_val = hw->mac.ops.setup_physical_interface(hw); in igc_setup_link_generic()
569 IGC_WRITE_REG(hw, IGC_FCTTV, hw->fc.pause_time); in igc_setup_link_generic()
747 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in igc_config_fc_after_link_up_generic()
[all …]
/freebsd/sys/dev/ixl/
H A Di40e_adminq.c304 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs()
305 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs()
309 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
312 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
342 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
345 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
351 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in i40e_config_arq_regs()
503 wr32(hw, hw->aq.asq.len, 0); in i40e_shutdown_asq()
504 wr32(hw, hw->aq.asq.bal, 0); in i40e_shutdown_asq()
505 wr32(hw, hw->aq.asq.bah, 0); in i40e_shutdown_asq()
[all …]
/freebsd/sys/dev/e1000/
H A De1000_api.c49 ret_val = hw->mac.ops.init_params(hw); in e1000_init_mac_params()
601 hw->mac.ops.clear_vfta(hw); in e1000_clear_vfta()
718 return hw->mac.ops.init_hw(hw); in e1000_init_hw()
829 return hw->mac.ops.led_on(hw); in e1000_led_on()
844 return hw->mac.ops.led_off(hw); in e1000_led_off()
1077 hw->phy.ops.release(hw); in e1000_release_phy()
1179 return hw->phy.ops.reset(hw); in e1000_phy_hw_reset()
1194 return hw->phy.ops.commit(hw); in e1000_phy_commit()
1345 hw->nvm.ops.reload(hw); in e1000_reload_nvm()
1410 hw->phy.ops.power_up(hw); in e1000_power_up_phy()
[all …]
H A De1000_82543.c751 if (!hw->mac.autoneg && (hw->mac.forced_speed_duplex & in e1000_phy_force_speed_duplex_82543()
802 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
890 ret_val = hw->phy.ops.get_cfg_done(hw); in e1000_phy_hw_reset_82543()
940 hw->nvm.ops.reload(hw); in e1000_reset_hw_82543()
1078 ret_val = hw->phy.ops.reset(hw); in e1000_setup_copper_link_82543()
1126 hw->mac.ops.config_collision_dist(hw); in e1000_setup_copper_link_82543()
1160 hw->mac.ops.config_collision_dist(hw); in e1000_setup_fiber_link_82543()
1258 hw->mac.ops.config_collision_dist(hw); in e1000_check_for_copper_link_82543()
1431 hw->mac.ops.config_collision_dist(hw); in e1000_config_mac_to_phy_82543()
1578 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82543()
[all …]
H A De1000_ich8lan.c237 hw->phy.ops.release(hw); in e1000_phy_is_accessible_pchlan()
241 hw->phy.ops.acquire(hw); in e1000_phy_is_accessible_pchlan()
411 hw->phy.ops.release(hw); in e1000_init_phy_workarounds_pchlan()
1005 hw->phy.ops.release(hw); in e1000_set_eee_pchlan()
1057 hw->phy.ops.release(hw); in e1000_k1_workaround_lpt_lp()
1394 hw->phy.ops.release(hw); in e1000_enable_ulp_lpt_lp()
1538 hw->phy.ops.release(hw); in e1000_disable_ulp_lpt_lp()
1540 hw->phy.ops.reset(hw); in e1000_disable_ulp_lpt_lp()
2203 hw->phy.ops.release(hw); in e1000_update_mc_addr_list_pch2lan()
2399 hw->phy.ops.release(hw); in e1000_sw_lcd_config_ich8lan()
[all …]
H A De1000_82575.c431 hw->mac.ops.set_lan_id(hw); in e1000_init_mac_params_82575()
556 ret_val = hw->phy.ops.acquire(hw); in e1000_read_phy_reg_sgmii_82575()
562 hw->phy.ops.release(hw); in e1000_read_phy_reg_sgmii_82575()
589 ret_val = hw->phy.ops.acquire(hw); in e1000_write_phy_reg_sgmii_82575()
595 hw->phy.ops.release(hw); in e1000_write_phy_reg_sgmii_82575()
735 ret_val = hw->phy.ops.commit(hw); in e1000_phy_hw_reset_sgmii_82575()
1437 ret_val = hw->phy.ops.reset(hw); in e1000_setup_copper_link_82575()
2138 ret_val = hw->phy.ops.acquire(hw); in e1000_read_phy_reg_82580()
2144 hw->phy.ops.release(hw); in e1000_read_phy_reg_82580()
2164 ret_val = hw->phy.ops.acquire(hw); in e1000_write_phy_reg_82580()
[all …]
H A De1000_80003es2lan.c267 hw->mac.ops.set_lan_id(hw); in e1000_init_mac_params_80003es2lan()
614 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
623 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
653 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, in e1000_phy_force_speed_duplex_80003es2lan()
671 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, in e1000_phy_force_speed_duplex_80003es2lan()
730 hw->phy.ops.cfg_on_link_up(hw); in e1000_get_link_up_info_80003es2lan()
1030 ret_val = hw->phy.ops.commit(hw); in e1000_copper_link_setup_gg82563_80003es2lan()
1074 if (!hw->mac.ops.check_mng_mode(hw)) { in e1000_copper_link_setup_gg82563_80003es2lan()
1077 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, in e1000_copper_link_setup_gg82563_80003es2lan()
1399 if (!(hw->mac.ops.check_mng_mode(hw) || in e1000_power_down_phy_copper_80003es2lan()
[all …]
H A De1000_82571.c114 switch (hw->mac.type) { in e1000_init_phy_params_82571()
171 switch (hw->mac.type) { in e1000_init_phy_params_82571()
226 switch (hw->mac.type) { in e1000_init_nvm_params_82571()
258 switch (hw->mac.type) { in e1000_init_nvm_params_82571()
363 switch (hw->mac.type) { in e1000_init_mac_params_82571()
1339 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data); in e1000_check_mng_mode_82574()
1391 ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER, in e1000_check_phy_82574()
1396 ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS, in e1000_check_phy_82574()
1696 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_82571()
1759 hw->mac.ops.rar_set(hw, hw->mac.addr, in e1000_set_laa_state_82571()
[all …]
H A De1000_mac.c387 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in e1000_init_rx_addrs_generic()
392 hw->mac.ops.rar_set(hw, mac_addr, i); in e1000_init_rx_addrs_generic()
471 hw->mac.ops.rar_set(hw, alt_mac_addr, 0); in e1000_check_alt_mac_addr_generic()
972 ret_val = hw->nvm.ops.read(hw, in e1000_set_default_fc_generic()
977 ret_val = hw->nvm.ops.read(hw, in e1000_set_default_fc_generic()
1018 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) in e1000_setup_link_generic()
1033 hw->fc.current_mode = hw->fc.requested_mode; in e1000_setup_link_generic()
1039 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_generic()
1195 hw->mac.ops.config_collision_dist(hw); in e1000_setup_fiber_serdes_link_generic()
1418 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in e1000_config_fc_after_link_up_generic()
[all …]
H A De1000_82540.c430 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, in e1000_setup_copper_link_82540()
435 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, in e1000_setup_copper_link_82540()
506 ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data); in e1000_adjust_serdes_amplitude_82540()
513 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_EXT_CTRL, in e1000_adjust_serdes_amplitude_82540()
539 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_vco_speed_82540()
572 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_vco_speed_82540()
598 ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data); in e1000_set_phy_mode_82540()
605 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_phy_mode_82540()
611 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, in e1000_set_phy_mode_82540()
700 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82540()
[all …]
H A De1000_phy.c670 hw->phy.ops.release(hw); in e1000_read_phy_reg_m88()
700 hw->phy.ops.release(hw); in e1000_write_phy_reg_m88()
761 hw->phy.ops.release(hw); in __e1000_read_phy_reg_igp()
830 hw->phy.ops.release(hw); in __e1000_write_phy_reg_igp()
903 hw->phy.ops.release(hw); in __e1000_read_kmrn_reg()
975 hw->phy.ops.release(hw); in __e1000_write_kmrn_reg()
3169 hw->phy.ops.release(hw); in e1000_write_phy_reg_bm()
3228 hw->phy.ops.release(hw); in e1000_read_phy_reg_bm()
3274 hw->phy.ops.release(hw); in e1000_read_phy_reg_bm2()
3320 hw->phy.ops.release(hw); in e1000_write_phy_reg_bm2()
[all …]
H A De1000_api.h61 void e1000_clear_vfta(struct e1000_hw *hw);
65 s32 e1000_reset_hw(struct e1000_hw *hw);
66 s32 e1000_init_hw(struct e1000_hw *hw);
67 s32 e1000_setup_link(struct e1000_hw *hw);
75 s32 e1000_setup_led(struct e1000_hw *hw);
76 s32 e1000_cleanup_led(struct e1000_hw *hw);
78 s32 e1000_blink_led(struct e1000_hw *hw);
79 s32 e1000_led_on(struct e1000_hw *hw);
80 s32 e1000_led_off(struct e1000_hw *hw);
81 s32 e1000_id_led_init(struct e1000_hw *hw);
[all …]
H A De1000_82541.c1114 hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003); in e1000_phy_init_script_82541()
1118 hw->phy.ops.write_reg(hw, 0x0000, 0x0140); in e1000_phy_init_script_82541()
1125 hw->phy.ops.write_reg(hw, 0x1F95, 0x0001); in e1000_phy_init_script_82541()
1127 hw->phy.ops.write_reg(hw, 0x1F71, 0xBD21); in e1000_phy_init_script_82541()
1129 hw->phy.ops.write_reg(hw, 0x1F79, 0x0018); in e1000_phy_init_script_82541()
1131 hw->phy.ops.write_reg(hw, 0x1F30, 0x1600); in e1000_phy_init_script_82541()
1133 hw->phy.ops.write_reg(hw, 0x1F31, 0x0014); in e1000_phy_init_script_82541()
1151 hw->phy.ops.write_reg(hw, 0x0000, 0x3300); in e1000_phy_init_script_82541()
1183 hw->phy.ops.write_reg(hw, in e1000_phy_init_script_82541()
1186 hw->phy.ops.write_reg(hw, in e1000_phy_init_script_82541()
[all …]
H A De1000_82542.c210 E1000_WRITE_FLUSH(hw); in e1000_reset_hw_82542()
223 hw->nvm.ops.reload(hw); in e1000_reset_hw_82542()
231 e1000_pci_set_mwi(hw); in e1000_reset_hw_82542()
255 mac->ops.clear_vfta(hw); in e1000_init_hw_82542()
262 E1000_WRITE_FLUSH(hw); in e1000_init_hw_82542()
272 E1000_WRITE_FLUSH(hw); in e1000_init_hw_82542()
275 e1000_pci_set_mwi(hw); in e1000_init_hw_82542()
337 hw->fc.current_mode = hw->fc.requested_mode; in e1000_setup_link_82542()
359 E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time); in e1000_setup_link_82542()
577 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_read_mac_addr_82542()
[all …]
/freebsd/sys/dev/iavf/
H A Diavf_adminq.c289 wr32(hw, hw->aq.asq.head, 0); in iavf_config_asq_regs()
290 wr32(hw, hw->aq.asq.tail, 0); in iavf_config_asq_regs()
293 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in iavf_config_asq_regs()
318 wr32(hw, hw->aq.arq.head, 0); in iavf_config_arq_regs()
319 wr32(hw, hw->aq.arq.tail, 0); in iavf_config_arq_regs()
322 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in iavf_config_arq_regs()
328 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in iavf_config_arq_regs()
480 wr32(hw, hw->aq.asq.len, 0); in iavf_shutdown_asq()
481 wr32(hw, hw->aq.asq.bal, 0); in iavf_shutdown_asq()
482 wr32(hw, hw->aq.asq.bah, 0); in iavf_shutdown_asq()
[all …]
/freebsd/sys/dev/ocs_fc/
H A Docs_hw.c1247 ocs_free(hw->os, hw->wqe_buffs, hw->config.n_io * hw->sli.config.wqe_size); in ocs_hw_teardown()
2116 ocs_hw_t *hw = seq->hw; in ocs_hw_unsol_process_bounce() local
2454 sport->hw = hw; in ocs_hw_port_alloc()
2810 domain->hw = hw; in ocs_hw_domain_alloc()
3490 ocs_hw_t *hw = io->hw; in ocs_hw_io_free_port_owned() local
3519 ocs_hw_t *hw = io->hw; in ocs_hw_io_free_internal() local
4363 ctx->hw = hw; in ocs_hw_send_frame()
8584 ocs_hw_t *hw = io->hw; in ocs_hw_wq_process_io() local
8847 ocs_hw_t *hw = io->hw; in ocs_hw_wq_process_abort() local
9525 hw->wqe_buffs = ocs_malloc(hw->os, hw->config.n_io * hw->sli.config.wqe_size, in ocs_hw_setup_io()
[all …]

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