Home
last modified time | relevance | path

Searched refs:psw (Results 1 – 25 of 2400) sorted by relevance

12345678910>>...96

/dports/emulators/qemu-utils/qemu-4.2.1/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/hppa/
H A Dhelper.c30 target_ureg psw; in cpu_hppa_get_psw() local
37 psw |= psw >> 3; in cpu_hppa_get_psw()
39 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
41 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
42 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
43 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
45 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
47 psw |= env->psw; in cpu_hppa_get_psw()
49 return psw; in cpu_hppa_get_psw()
57 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/hppa/
H A Dhelper.c28 target_ureg psw; in cpu_hppa_get_psw() local
35 psw |= psw >> 3; in cpu_hppa_get_psw()
37 psw |= (psw >> 6) & 0x000f000f; in cpu_hppa_get_psw()
39 psw |= (psw >> 12) & 0xf; in cpu_hppa_get_psw()
40 psw |= env->psw_cb_msb << 7; in cpu_hppa_get_psw()
41 psw = (psw & 0xff) << 8; in cpu_hppa_get_psw()
43 psw |= env->psw_n * PSW_N; in cpu_hppa_get_psw()
45 psw |= env->psw; in cpu_hppa_get_psw()
47 return psw; in cpu_hppa_get_psw()
54 env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); in cpu_hppa_put_psw()
[all …]
/dports/biology/py-biopython/biopython-1.79/Tests/
H A Dtest_psw.py12 from Bio.Wise import psw
21 a = psw.Alignment()
33 a = psw.Alignment()
42 ac = psw.AlignmentColumn(psw.ColumnUnit(0, random.randint(0, 9999), "SEQUENCE"))
46 ac = psw.AlignmentColumn(psw.ColumnUnit(0, random.randint(0, 9999), "INSERT"))
50 ac = psw.AlignmentColumn(psw.ColumnUnit(0, random.randint(0, 9999), "SEQUENCE"))
54 ac = psw.AlignmentColumn(psw.ColumnUnit(0, random.randint(0, 9999), "SEQUENCE"))
59 ac = psw.AlignmentColumn(psw.ColumnUnit(0, 34, "SEQUENCE"))
64 ac = psw.AlignmentColumn(psw.ColumnUnit(0, random.randint(0, 9999), "SEQUENCE"))
75 psw.AlignmentColumn,
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/d30v-elf/
H A Ddo-flags.S15 mvtsys psw,r1 ||nop
30 mvtsys psw,r1,||nop
32 mvfsys r42,psw
44 mvtsys psw,r8 ||nop
47 mvfsys r10,psw
59 mvtsys psw,r8 ||nop
62 mvfsys r10,psw
73 mvtsys psw,r8 ||nop
76 mvfsys r10,psw
90 mvfsys r10,psw
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/d30v-elf/
H A Ddo-flags.S15 mvtsys psw,r1 ||nop
30 mvtsys psw,r1,||nop
32 mvfsys r42,psw
44 mvtsys psw,r8 ||nop
47 mvfsys r10,psw
59 mvtsys psw,r8 ||nop
62 mvfsys r10,psw
73 mvtsys psw,r8 ||nop
76 mvfsys r10,psw
90 mvfsys r10,psw
[all …]
/dports/emulators/hercules/hercules-3.13/
H A Dtrace.c657 STORE_FW(tte->retna, (regs->psw.amode << 31) | regs->psw.IA_L | PROBSTATE(&regs->psw)); in ARCH_DEP()
685 STORE_FW(tte->retna, (regs->psw.amode << 31) | regs->psw.IA_L | PROBSTATE(&regs->psw)); in ARCH_DEP()
714 STORE_FW(tte->retna, (regs->psw.amode << 31) | regs->psw.IA_L | PROBSTATE(&regs->psw)); in ARCH_DEP()
748 if(!regs->psw.amode64 && !newregs->psw.amode64) in ARCH_DEP()
765 if(regs->psw.amode64 && regs->psw.IA_H == 0 && !newregs->psw.amode64) in ARCH_DEP()
779 if(regs->psw.amode64 && regs->psw.IA_H != 0 && !newregs->psw.amode64) in ARCH_DEP()
793 if(!regs->psw.amode64 && newregs->psw.amode64 && newregs->psw.IA_H == 0) in ARCH_DEP()
807 if(regs->psw.amode64 && regs->psw.IA_H == 0 && newregs->psw.amode64 && newregs->psw.IA_H == 0) in ARCH_DEP()
820 if(regs->psw.amode64 && regs->psw.IA_H != 0 && newregs->psw.amode64 && newregs->psw.IA_H == 0) in ARCH_DEP()
833 if(!regs->psw.amode64 && newregs->psw.amode64 && newregs->psw.IA_H != 0) in ARCH_DEP()
[all …]
H A Dcpu.c86 | ((regs->psw.pkey | regs->psw.states) << 16) in ARCH_DEP()
106 | ((regs->psw.pkey | regs->psw.states) << 16) in ARCH_DEP()
130 | ((regs->psw.pkey | regs->psw.states) << 16) in ARCH_DEP()
181 regs->psw.AMASK = regs->psw.amode64 ? AMASK64 in ARCH_DEP()
187 regs->psw.AMASK = regs->psw.amode ? AMASK31 : AMASK24; in ARCH_DEP()
231 if (regs->psw.amode64 && !regs->psw.amode) in ARCH_DEP()
235 if (!regs->psw.amode && regs->psw.IA > 0x00FFFFFF) in ARCH_DEP()
239 if (!regs->psw.amode64 && regs->psw.IA > 0x7FFFFFFF) in ARCH_DEP()
245 if (!regs->psw.amode && regs->psw.IA > 0x00FFFFFF) in ARCH_DEP()
270 regs->psw.amode64 = regs->psw.amode = 0; in ARCH_DEP()
[all …]
H A Dgeneral2.c1208 regs->psw.cc = in DEF_INST()
1214 if ( regs->psw.cc == 3 && FOMASK(&regs->psw) ) in DEF_INST()
1235 regs->psw.cc = in DEF_INST()
1241 if ( regs->psw.cc == 3 && FOMASK(&regs->psw) ) in DEF_INST()
1262 regs->psw.cc = in DEF_INST()
1268 if ( regs->psw.cc == 3 && FOMASK(&regs->psw) ) in DEF_INST()
1312 regs->psw.cc = in DEF_INST()
1481 regs->psw.cc = in DEF_INST()
1508 regs->psw.cc = in DEF_INST()
1537 regs->psw.cc = in DEF_INST()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/sh/drivers/
H A Dpush-switch.c28 struct push_switch *psw = from_timer(psw, t, debounce); in switch_timer() local
30 schedule_work(&psw->work); in switch_timer()
38 psw->state = 0; in switch_work_handler()
46 struct push_switch *psw; in switch_drv_probe() local
50 if (unlikely(!psw)) in switch_drv_probe()
81 psw->pdev = pdev; in switch_drv_probe()
83 platform_set_drvdata(pdev, psw); in switch_drv_probe()
90 kfree(psw); in switch_drv_probe()
104 flush_work(&psw->work); in switch_drv_remove()
105 del_timer_sync(&psw->debounce); in switch_drv_remove()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/sh/drivers/
H A Dpush-switch.c28 struct push_switch *psw = from_timer(psw, t, debounce); in switch_timer() local
30 schedule_work(&psw->work); in switch_timer()
38 psw->state = 0; in switch_work_handler()
46 struct push_switch *psw; in switch_drv_probe() local
50 if (unlikely(!psw)) in switch_drv_probe()
81 psw->pdev = pdev; in switch_drv_probe()
83 platform_set_drvdata(pdev, psw); in switch_drv_probe()
90 kfree(psw); in switch_drv_probe()
104 flush_work(&psw->work); in switch_drv_remove()
105 del_timer_sync(&psw->debounce); in switch_drv_remove()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/arch/sh/drivers/
H A Dpush-switch.c28 struct push_switch *psw = from_timer(psw, t, debounce); in switch_timer() local
30 schedule_work(&psw->work); in switch_timer()
38 psw->state = 0; in switch_work_handler()
46 struct push_switch *psw; in switch_drv_probe() local
50 if (unlikely(!psw)) in switch_drv_probe()
81 psw->pdev = pdev; in switch_drv_probe()
83 platform_set_drvdata(pdev, psw); in switch_drv_probe()
90 kfree(psw); in switch_drv_probe()
104 flush_work(&psw->work); in switch_drv_remove()
105 del_timer_sync(&psw->debounce); in switch_drv_remove()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/rx/
H A Dcpu.h138 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
165 uint32_t psw = 0;
166 psw = FIELD_DP32(psw, PSW, IPL, env->psw_ipl);
167 psw = FIELD_DP32(psw, PSW, PM, env->psw_pm);
168 psw = FIELD_DP32(psw, PSW, U, env->psw_u);
169 psw = FIELD_DP32(psw, PSW, I, env->psw_i);
170 psw = FIELD_DP32(psw, PSW, O, env->psw_o >> 31);
171 psw = FIELD_DP32(psw, PSW, S, env->psw_s >> 31);
172 psw = FIELD_DP32(psw, PSW, Z, env->psw_z == 0);
173 psw = FIELD_DP32(psw, PSW, C, env->psw_c);
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/rx/
H A Dcpu.h138 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
165 uint32_t psw = 0; in rx_cpu_pack_psw() local
166 psw = FIELD_DP32(psw, PSW, IPL, env->psw_ipl); in rx_cpu_pack_psw()
167 psw = FIELD_DP32(psw, PSW, PM, env->psw_pm); in rx_cpu_pack_psw()
168 psw = FIELD_DP32(psw, PSW, U, env->psw_u); in rx_cpu_pack_psw()
169 psw = FIELD_DP32(psw, PSW, I, env->psw_i); in rx_cpu_pack_psw()
170 psw = FIELD_DP32(psw, PSW, O, env->psw_o >> 31); in rx_cpu_pack_psw()
171 psw = FIELD_DP32(psw, PSW, S, env->psw_s >> 31); in rx_cpu_pack_psw()
172 psw = FIELD_DP32(psw, PSW, Z, env->psw_z == 0); in rx_cpu_pack_psw()
173 psw = FIELD_DP32(psw, PSW, C, env->psw_c); in rx_cpu_pack_psw()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/s390/include/asm/
H A Dprocessor.h165 regs->psw.addr = new_psw; \
172 regs->psw.addr = new_psw; \
240 static inline void __load_psw(psw_t psw) in __load_psw() argument
252 psw_t psw; in __load_psw_mask() local
254 psw.mask = mask; in __load_psw_mask()
261 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc"); in __load_psw_mask()
292 mask = (psw.mask & PSW_MASK_EA) ? -1UL : in __rewind_psw()
295 return (psw.addr - ilc) & mask; in __rewind_psw()
303 psw_t psw; in disabled_wait() local
306 psw.addr = _THIS_IP_; in disabled_wait()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/s390/include/asm/
H A Dprocessor.h165 regs->psw.addr = new_psw; \
172 regs->psw.addr = new_psw; \
240 static inline void __load_psw(psw_t psw) in __load_psw() argument
252 psw_t psw; in __load_psw_mask() local
254 psw.mask = mask; in __load_psw_mask()
261 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc"); in __load_psw_mask()
292 mask = (psw.mask & PSW_MASK_EA) ? -1UL : in __rewind_psw()
295 return (psw.addr - ilc) & mask; in __rewind_psw()
303 psw_t psw; in disabled_wait() local
306 psw.addr = _THIS_IP_; in disabled_wait()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/arch/s390/include/asm/
H A Dprocessor.h165 regs->psw.addr = new_psw; \
172 regs->psw.addr = new_psw; \
240 static inline void __load_psw(psw_t psw) in __load_psw() argument
252 psw_t psw; in __load_psw_mask() local
254 psw.mask = mask; in __load_psw_mask()
261 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc"); in __load_psw_mask()
292 mask = (psw.mask & PSW_MASK_EA) ? -1UL : in __rewind_psw()
295 return (psw.addr - ilc) & mask; in __rewind_psw()
303 psw_t psw; in disabled_wait() local
306 psw.addr = _THIS_IP_; in disabled_wait()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/target/rx/
H A Dcpu.h139 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
167 uint32_t psw = 0; in rx_cpu_pack_psw() local
168 psw = FIELD_DP32(psw, PSW, IPL, env->psw_ipl); in rx_cpu_pack_psw()
169 psw = FIELD_DP32(psw, PSW, PM, env->psw_pm); in rx_cpu_pack_psw()
170 psw = FIELD_DP32(psw, PSW, U, env->psw_u); in rx_cpu_pack_psw()
171 psw = FIELD_DP32(psw, PSW, I, env->psw_i); in rx_cpu_pack_psw()
172 psw = FIELD_DP32(psw, PSW, O, env->psw_o >> 31); in rx_cpu_pack_psw()
173 psw = FIELD_DP32(psw, PSW, S, env->psw_s >> 31); in rx_cpu_pack_psw()
174 psw = FIELD_DP32(psw, PSW, Z, env->psw_z == 0); in rx_cpu_pack_psw()
175 psw = FIELD_DP32(psw, PSW, C, env->psw_c); in rx_cpu_pack_psw()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/rx/
H A Dcpu.h140 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
168 uint32_t psw = 0; in rx_cpu_pack_psw() local
169 psw = FIELD_DP32(psw, PSW, IPL, env->psw_ipl); in rx_cpu_pack_psw()
170 psw = FIELD_DP32(psw, PSW, PM, env->psw_pm); in rx_cpu_pack_psw()
171 psw = FIELD_DP32(psw, PSW, U, env->psw_u); in rx_cpu_pack_psw()
172 psw = FIELD_DP32(psw, PSW, I, env->psw_i); in rx_cpu_pack_psw()
173 psw = FIELD_DP32(psw, PSW, O, env->psw_o >> 31); in rx_cpu_pack_psw()
174 psw = FIELD_DP32(psw, PSW, S, env->psw_s >> 31); in rx_cpu_pack_psw()
175 psw = FIELD_DP32(psw, PSW, Z, env->psw_z == 0); in rx_cpu_pack_psw()
176 psw = FIELD_DP32(psw, PSW, C, env->psw_c); in rx_cpu_pack_psw()
[all …]

12345678910>>...96