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Searched refs:r5 (Results 1 – 25 of 39) sorted by path

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/qemu/common-user/host/arm/
H A Dsafe-syscall.inc.S35 push { r4, r5, r6, r7, r8, lr }
36 .save { r4, r5, r6, r7, r8, lr }
39 .cfi_rel_offset r5, 4
61 ldm r12, { r2, r3, r4, r5, r6 }
90 pop { r4, r5, r6, r7, r8, pc }
96 1: pop { r4, r5, r6, r7, r8, lr }
99 .cfi_restore r5
/qemu/common-user/host/s390x/
H A Dsafe-syscall.inc.S59 lgr %r3,%r5
61 lmg %r5,%r7,320(%r15)
/qemu/docs/specs/
H A Dppc-spapr-hcalls.rst74 ``r5``: Guest physical address of source.
H A Dppc-spapr-uv-hcalls.rst55 ``r5``: ``in_buffer``, guest physical address of buffer containing the
/qemu/linux-user/alpha/
H A Dtarget_syscall.h13 abi_ulong r5; member
/qemu/linux-user/arm/
H A Dvdso.S127 .cfi_offset r5, -11 * 4
/qemu/linux-user/cris/
H A Dcpu_loop.c83 env->regs[5] = regs->r5; in target_cpu_copy_regs()
H A Dsignal.c53 __put_user(env->regs[5], &sc->regs.r5); in setup_sigcontext()
76 __get_user(env->regs[5], &sc->regs.r5); in restore_sigcontext()
H A Dtarget_syscall.h20 unsigned long r5; member
/qemu/linux-user/hexagon/
H A Dsignal.c28 target_ulong r4, r5, r6, r7; member
84 __put_user(env->gpr[HEX_REG_R05], &sc->r5); in setup_sigcontext()
200 __get_user(env->gpr[HEX_REG_R05], &sc->r5); in restore_sigcontext()
/qemu/linux-user/microblaze/
H A Dcpu_loop.c137 env->regs[5] = regs->r5; in target_cpu_copy_regs()
H A Dsignal.c58 __put_user(env->regs[5], &sc->regs.r5); in setup_sigcontext()
95 __get_user(env->regs[5], &sc->regs.r5); in restore_sigcontext()
H A Dtarget_syscall.h16 microblaze_reg_t r5; member
/qemu/pc-bios/vof/
H A Dmain.c7 register unsigned long r5 __asm__("r5") = (unsigned long) _prom_entry; in do_boot()
16 register unsigned long r5 __asm__("r5"); in entry_c()
/qemu/target/cris/
H A Dtranslate_v10.c.inc27 "$r4", "$r5", "$r6", "$r7",
/qemu/tcg/arm/
H A Dtcg-target.c.inc40 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
3030 0x85, 8, /* DW_CFA_offset, r5, -32 */
/qemu/tcg/ppc/
H A Dtcg-target.c.inc116 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
/qemu/tcg/s390x/
H A Dtcg-target.c.inc325 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
/qemu/tcg/
H A Dtci.c193 *r5 = extract32(insn, 28, 4); in tci_args_rrrrrr()
375 TCGReg r0, r1, r2, r3, r4, r5; in tcg_qemu_tb_exec() local
678 tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); in tcg_qemu_tb_exec()
680 T2 = tci_uint64(regs[r5], regs[r4]); in tcg_qemu_tb_exec()
686 tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); in tcg_qemu_tb_exec()
688 T2 = tci_uint64(regs[r5], regs[r4]); in tcg_qemu_tb_exec()
824 T2 = regs[r3] + regs[r5] + (T1 < regs[r2]); in tcg_qemu_tb_exec()
833 T2 = regs[r3] - regs[r5] - (regs[r2] < regs[r4]); in tcg_qemu_tb_exec()
1074 TCGReg r0, r1, r2, r3, r4, r5; in print_insn_tci() local
1276 tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); in print_insn_tci()
[all …]
/qemu/tcg/tci/
H A Dtcg-target.c.inc457 TCGReg r3, TCGReg r4, TCGReg r5)
467 insn = deposit32(insn, 28, 4, r5);
/qemu/tests/tcg/cris/bare/
H A Dcheck_addcv17.s47 move.d mem2,r5
49 cmp.d r4,r5
59 move.d mem2,r5
61 addq 4,r5
62 cmp.d r4,r5
H A Dcheck_addiv32.s14 move.d x-32768,r5
16 addi r6.b,r5,acr
21 addu.w 32771,r5
24 addi r8.w,r5,acr
36 subq 1,r5
37 move.d r5,r8
57 addi r12.d,r5,acr
H A Dcheck_addm.s14 move.d x,r5
15 add.d [r5+],r3
20 add.d [r5],r3
22 addq 4,r5
26 add.d [r5+],r3
31 add.d [r5+],r3
36 add.d [r5+],r3
41 add.w [r5+],r3
51 add.w [r5],r3
66 add.b [r5],r3
[all …]
H A Dcheck_addxm.s18 move.d x,r5
19 adds.b [r5+],r3
24 adds.w [r5+],r3
29 subq 3,r5
30 addu.b [r5+],r3
35 addu.w [r5+],r3
36 subq 3,r5
41 addu.b [r5],r3
46 addu.w [r5],r3
51 adds.b [r5],r3
[all …]
H A Dcheck_andm.s13 move.d x,r5
14 and.d [r5+],r3
19 and.d [r5],r3
21 addq 4,r5
25 and.d [r5+],r3
30 and.d [r5+],r3
35 and.d [r5+],r3
40 and.w [r5+],r3
50 and.w [r5],r3
52 addq 2,r5
[all …]

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