/freebsd/sys/contrib/alpine-hal/eth/ |
H A D | al_hal_eth_kr.c | 502 uint16_t reg; in al_eth_lp_coeff_up_get() local 532 uint16_t reg; in al_eth_lp_status_report_get() local 617 uint16_t reg; in al_eth_kr_receiver_frame_lock_get() local 628 uint16_t reg; in al_eth_kr_startup_proto_prog_get() local 639 uint16_t reg; in al_eth_kr_training_status_fail_get() local 691 uint16_t reg; in al_eth_kr_an_write_adv() local 696 reg = 0; in al_eth_kr_an_write_adv() 721 reg = 0; in al_eth_kr_an_write_adv() 733 reg = 0; in al_eth_kr_an_write_adv() 751 int16_t reg; in al_eth_kr_an_read_adv() local [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/ |
H A D | vf610-zii-dev-rev-b.dts | 26 reg = <1>; 34 reg = <0>; 47 reg = <0>; 53 reg = <1>; 59 reg = <2>; 110 reg = <2>; 118 reg = <0>; 199 reg = <4>; 285 reg = <8>; 308 reg = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-lx2160a-bluebox3.dts | 105 reg = <0x0>; 112 reg = <0x8>; 120 reg = <0x5>; 127 reg = <0x6>; 137 reg = <0x0>; 144 reg = <0x8>; 172 reg = <0>; 183 reg = <1>; 196 reg = <0x77>; 358 reg = <0>; [all …]
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/freebsd/sys/dev/flash/ |
H A D | cqspi.c | 255 uint32_t reg; in cqspi_cmd_write_addr() local 278 uint32_t reg; in cqspi_cmd_write() local 296 uint32_t reg; in cqspi_cmd_read() local 376 uint32_t reg; in cqspi_wait_idle() local 413 uint32_t reg; in cqspi_write() local 470 uint32_t reg; in cqspi_read() local 522 uint32_t reg; in cqspi_init() local 552 reg &= ~(CFG_EN); in cqspi_init() 567 reg |= CFG_BAUD12; in cqspi_init() 568 reg |= CFG_ENDMA; in cqspi_init() [all …]
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/freebsd/contrib/wpa/src/wps/ |
H A D | wps_registrar.c | 603 if (reg->pbc) in wps_build_sel_reg_config_methods() 672 struct wps_registrar *reg = os_zalloc(sizeof(*reg)); in wps_registrar_init() local 723 return reg; in wps_registrar_init() 757 os_free(reg); in wps_registrar_deinit() 824 reg->pbc = 0; in wps_registrar_add_pin() 1183 reg->enrollee_seen_cb(reg->cb_ctx, addr, attr.uuid_e, in wps_registrar_probe_req_rx() 1247 reg->pin_needed_cb(reg->cb_ctx, uuid_e, dev); in wps_cb_pin_needed() 1285 reg->selected_registrar, reg->wps->config_methods, in wps_cb_set_sel_reg() 1288 reg->set_sel_reg_cb(reg->cb_ctx, reg->selected_registrar, in wps_cb_set_sel_reg() 3553 reg->sel_reg_union = reg->selected_registrar; in wps_registrar_selected_registrar_changed() [all …]
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/freebsd/sys/dev/pwm/controller/rockchip/ |
H A D | rk_pwm.c | 51 #define SET(reg,mask,val) reg = ((reg & ~mask) | val) argument 123 #define RK_PWM_READ(sc, reg) bus_read_4((sc)->res, (reg)) argument 124 #define RK_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) argument 149 uint32_t reg; in rk_pwm_attach() local 183 reg &= RK_PWM_CTRL_PRESCALE_MASK; in rk_pwm_attach() 187 reg &= RK_PWM_CTRL_SCALE_MASK; in rk_pwm_attach() 207 (clk_freq / reg); in rk_pwm_attach() 210 (clk_freq / reg); in rk_pwm_attach() 268 uint32_t reg; in rk_pwm_channel_config() local 314 SET(reg, RK_PWM_CTRL_SCALE_MASK, in rk_pwm_channel_config() [all …]
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterContextPOSIX_arm64.h | 50 bool IsGPR(unsigned reg); 52 bool IsFPR(unsigned reg); 56 bool IsSVE(unsigned reg) const; 57 bool IsPAuth(unsigned reg) const; 58 bool IsTLS(unsigned reg) const; 59 bool IsSME(unsigned reg) const; 60 bool IsMTE(unsigned reg) const; 62 bool IsSVEZ(unsigned reg) const { return m_register_info_up->IsSVEZReg(reg); } in IsSVEZ() argument 63 bool IsSVEP(unsigned reg) const { return m_register_info_up->IsSVEPReg(reg); } in IsSVEP() argument 64 bool IsSVEVG(unsigned reg) const { in IsSVEVG() argument [all …]
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
H A D | aspeed-bmc-ibm-bonnell.dts | 209 reg = <0 0>; 610 reg = <0>; 616 reg = <1>; 632 reg = <0>; 640 reg = <1>; 648 reg = <2>; 656 reg = <3>; 764 reg = <0>; 770 reg = <1>; 776 reg = <2>; [all …]
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H A D | aspeed-bmc-facebook-tiogapass.dts | 218 reg = <0x71>; 223 reg = <0>; 255 reg = <0>; 261 reg = <1>; 267 reg = <2>; 273 reg = <3>; 283 reg = <1>; 315 reg = <0>; 321 reg = <1>; 343 reg = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/ |
H A D | stingray-sata.dtsi | 49 reg = <0>; 64 reg = <0>; 79 reg = <0>; 94 reg = <0>; 109 reg = <0>; 124 reg = <0>; 139 reg = <0>; 154 reg = <0>; 169 reg = <0>; 184 reg = <0>; [all …]
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/freebsd/sys/dev/sdhci/ |
H A D | sdhci_xenon.c | 195 uint32_t reg; in sdhci_xenon_phy_init() local 216 reg |= XENON_PHY_INITIALIZATION; in sdhci_xenon_phy_init() 240 uint32_t reg; in sdhci_xenon_phy_set() local 277 reg &= ~SDHCI_CLOCK_CARD_EN; in sdhci_xenon_phy_set() 285 reg &= ~XENON_DQ_ASYNC_MODE; in sdhci_xenon_phy_set() 295 reg |= XENON_DQ_ASYNC_MODE; in sdhci_xenon_phy_set() 301 reg |= SDHCI_CLOCK_CARD_EN; in sdhci_xenon_phy_set() 329 uint32_t reg; in sdhci_xenon_update_ios() local 497 uint32_t reg; in sdhci_xenon_attach() local 552 reg |= (1 << sc->slot_id); in sdhci_xenon_attach() [all …]
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/freebsd/sys/dev/etherswitch/arswitch/ |
H A D | arswitch_reg.c | 66 uint16_t *reg) in arswitch_split_setpage() argument 90 uint16_t phy, reg; in arswitch_readreg16() local 102 uint16_t phy, reg; in arswitch_writereg16() local 151 phy, reg, lo); in arswitch_reg_write32() 153 phy, reg + 1, hi); in arswitch_reg_write32() 156 phy, reg + 1, hi); in arswitch_reg_write32() 158 phy, reg, lo); in arswitch_reg_write32() 167 uint16_t phy, reg; in arswitch_readreg() local 176 uint16_t phy, reg; in arswitch_writereg() local 221 uint16_t phy, reg; in arswitch_modifyreg() local [all …]
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/freebsd/sys/arm/freescale/vybrid/ |
H A D | vf_spi.c | 147 uint32_t reg; in spi_attach() local 160 reg = READ4(sc, SPI_MCR); in spi_attach() 161 reg |= MCR_MSTR; in spi_attach() 166 WRITE4(sc, SPI_MCR, reg); in spi_attach() 169 reg |= RSER_EOQF_RE; in spi_attach() 172 reg = READ4(sc, SPI_MCR); in spi_attach() 173 reg &= ~MCR_HALT; in spi_attach() 174 WRITE4(sc, SPI_MCR, reg); in spi_attach() 186 reg |= CTAR_CPHA; in spi_attach() 191 reg |= CTAR_LSBFE; in spi_attach() [all …]
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H A D | vf_uart.c | 204 int reg; in uart_reinit() local 228 reg &= ~UART_BDH_SBR; in uart_reinit() 232 reg = sbr & 0x00ff; in uart_reinit() 236 reg &= ~UART_C4_BRFA; in uart_reinit() 293 int reg; in vf_uart_bus_attach() local 304 reg &= ~UART_C2_RIE; in vf_uart_bus_attach() 306 reg |= UART_C2_RIE; in vf_uart_bus_attach() 367 int reg; in vf_uart_bus_ipend() local 440 int reg; in vf_uart_bus_receive() local 471 int reg; in vf_uart_bus_setsig() local [all …]
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/freebsd/sys/dev/enetc/ |
H A D | enetc.h | 103 #define ENETC_RD4(sc, reg) \ argument 104 bus_read_4((sc)->regs, reg) 105 #define ENETC_WR4(sc, reg, value) \ argument 106 bus_write_4((sc)->regs, reg, value) 108 #define ENETC_PORT_RD8(sc, reg) \ argument 110 #define ENETC_PORT_RD4(sc, reg) \ argument 114 #define ENETC_PORT_RD2(sc, reg) \ argument 119 #define ENETC_TXQ_RD4(sc, q, reg) \ argument 120 ENETC_RD4((sc), ENETC_BDR(TX, q, reg)) 123 #define ENETC_RXQ_RD4(sc, q, reg) \ argument [all …]
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/freebsd/sys/dev/vge/ |
H A D | if_vgevar.h | 224 #define CSR_READ_4(sc, reg) \ argument 225 bus_read_4(sc->vge_res, reg) 226 #define CSR_READ_2(sc, reg) \ argument 227 bus_read_2(sc->vge_res, reg) 229 bus_read_1(sc->vge_res, reg) 232 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x)) 234 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x)) 236 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x)) 239 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x)) 241 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x)) [all …]
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm958625-meraki-alamo.dtsi | 84 reg = <0x0>; 89 reg = <0>; 93 reg = <1>; 97 reg = <2>; 101 reg = <3>; 105 reg = <4>; 249 reg = <0>; 254 reg = <1>; 259 reg = <4>; 268 reg = <5>; [all …]
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/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/ |
H A D | octeon_3xxx.dts | 24 reg = <0>; 36 reg = <1>; 40 reg = <2>; 48 reg = <3>; 56 reg = <4>; 64 reg = <5>; 73 reg = <6>; 81 reg = <7>; 89 reg = <8>; 97 reg = <9>; [all …]
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H A D | octeon_68xx.dts | 70 reg = <6>; 75 reg = <1>; 84 reg = <2>; 93 reg = <3>; 102 reg = <4>; 119 reg = <1>; 128 reg = <2>; 137 reg = <3>; 146 reg = <4>; 163 reg = <1>; [all …]
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/freebsd/contrib/llvm-project/lldb/source/Target/ |
H A D | DynamicRegisterInfo.cpp | 405 assert(reg.name); in SetRegisterInfo() 406 assert(reg.set_name); in SetRegisterInfo() 418 reg.name.AsCString(), reg.alt_name.AsCString(), reg.byte_size, in SetRegisterInfo() 419 reg.byte_offset, reg.encoding, reg.format, in SetRegisterInfo() 420 {reg.regnum_ehframe, reg.regnum_dwarf, reg.regnum_generic, in SetRegisterInfo() 555 if ((strcmp(reg.name, "pc") == 0) || (strcmp(reg.name, "r15") == 0)) in Finalize() 578 if ((strcmp(reg.name, "eip") == 0) || (strcmp(reg.name, "pc") == 0)) in Finalize() 594 if ((strcmp(reg.name, "rip") == 0) || (strcmp(reg.name, "pc") == 0)) in Finalize() 624 if ((strcmp(reg.name, "vg") == 0) || (strcmp(reg.name, "svg") == 0)) { in Finalize() 666 reg.byte_offset = in ConfigureOffsets() [all …]
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/freebsd/sys/contrib/device-tree/src/arm/vt8500/ |
H A D | wm8750.dtsi | 25 reg = <0x0 0x0>; 95 reg = <0x200>; 102 reg = <0x204>; 109 reg = <0x208>; 116 reg = <0x20C>; 123 reg = <0x210>; 130 divisor-reg = <0x300>; 137 divisor-reg = <0x304>; 144 divisor-reg = <0x320>; 158 enable-reg = <0x254>; [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | t4240qds.dts | 149 reg = <0>; 152 reg = <0x1>; 156 reg = <0x2>; 163 reg = <0x20>; 167 reg = <0x0>; 171 reg = <0x1>; 175 reg = <0x2>; 362 reg = <0>; 370 reg = <0x77>; 377 reg = <0>; [all …]
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/freebsd/sys/dev/pci/ |
H A D | pci_dw.c | 68 #define DBI_RD1(sc, reg) pci_dw_dbi_rd1((sc)->dev, reg) argument 69 #define DBI_RD2(sc, reg) pci_dw_dbi_rd2((sc)->dev, reg) argument 70 #define DBI_RD4(sc, reg) pci_dw_dbi_rd4((sc)->dev, reg) argument 137 uint32_t reg; in pci_dw_dbi_protect() local 149 u_int reg) in pci_dw_check_dev() argument 182 uint32_t reg; in pci_dw_detect_out_atu_regions_unroll() local 203 uint32_t reg; in pci_dw_detect_out_atu_regions_legacy() local 211 reg); in pci_dw_detect_out_atu_regions_legacy() 247 uint32_t reg; in pci_dw_map_out_atu_unroll() local 285 uint32_t reg; in pci_dw_map_out_atu_legacy() local [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-apq8084.dtsi | 33 reg = <0>; 44 reg = <1>; 55 reg = <2>; 66 reg = <3>; 94 reg = <0x0 0x0>; 255 reg = <0xd0 0x1>; 260 reg = <0xd1 0x1>; 265 reg = <0xd1 0x2>; 270 reg = <0xd2 0x2>; 275 reg = <0xd3 0x1>; [all …]
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/freebsd/sys/dev/dwc/ |
H A D | dwc1000_core.c | 148 uint32_t reg; in dwc1000_miibus_statchg() local 177 reg |= (CONF_PS); in dwc1000_miibus_statchg() 189 reg |= (CONF_DM); in dwc1000_miibus_statchg() 210 uint32_t reg; in dwc1000_core_setup() local 223 uint32_t reg; in dwc1000_enable_mac() local 237 uint32_t reg; in dwc1000_enable_csum_offload() local 242 reg |= CONF_IPC; in dwc1000_enable_csum_offload() 244 reg &= ~CONF_IPC; in dwc1000_enable_csum_offload() 395 uint32_t reg; in dwc1000_clear_stats() local 433 uint32_t reg; in dwc1000_intr() local [all …]
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